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UpTone Audio EtherREGEN (Objective Discussion Only)


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Surprised no one has mentioned Amir’s measurements of the etherRegen over at Audio Science Review.  His measurements of jitter (oh excuse me phase noise) with and without the Regen were absolutely identical. So the premise of additive phase noise upstream sounds like more BS to me. 😡

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1 hour ago, RussL said:

Surprised no one has mentioned Amir’s measurements of the etherRegen over at Audio Science Review.  His measurements of jitter (oh excuse me phase noise) with and without the Regen were absolutely identical. So the premise of additive phase noise upstream sounds like more BS to me. 😡

 

 You could have at least given the members and readers, a chance to see John Swenson's side of the story.

https://cdn.shopify.com/s/files/1/0660/6121/files/UpTone-J.Swenson_EtherREGEN_white_paper.pdf?v=1583429386

 

How a Digital Audio file sounds, or a Digital Video file looks, is governed to a large extent by the Power Supply area. All that Identical Checksums gives is the possibility of REGENERATING the file to close to that of the original file.

PROFILE UPDATED 13-11-2020

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5 hours ago, sandyk said:

 

 You could have at least given the members and readers, a chance to see John Swenson's side of the story.

https://cdn.shopify.com/s/files/1/0660/6121/files/UpTone-J.Swenson_EtherREGEN_white_paper.pdf?v=1583429386

 

I read that - what's missing for me is the mechanism by which the groundplane noise gets to affect the clock. If the designers put the clock itself on the same groundplane as the rest of the logic I can see how it would matter but designers who're aware of this issue would likely use a separate groundplane (island) for such sensitive circuits as an oscillator. Or is it that DAC designers are blissfully unaware of ground bounce issues?

 

If its that DAC designers are screwing up layouts it would be great to see examples of PCB layout errors in various vendors' offerings.

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Its not a request as such, just it would be good to see an example of how clocks get corrupted in DACs where the designers have made layout errors. It would help the industry to improve their designs.

 

I am not expecting them to do this, its just a wish.

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5 hours ago, opus101 said:

I read that - what's missing for me is the mechanism by which the groundplane noise gets to affect the clock. If the designers put the clock itself on the same groundplane as the rest of the logic I can see how it would matter but designers who're aware of this issue would likely use a separate groundplane (island) for such sensitive circuits as an oscillator.


JS is certainly correct that ground plane noise affects crystal oscillators. This is a very interesting issue. 
 

There is a nonlinearity whereby noise at f causes f frequency offset phase noise. 
 

ie noise at 1Hz causes phase error f +|- 1 Hz and 10 Hz causes phase error f +|- 10 Hz ... this is described in Rubiola’s textbook: https://www.cambridge.org/core/books/phase-noise-and-frequency-stability-in-oscillators/445C12C4ECBFCD7765116E61561EC0FE

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2 hours ago, jabbr said:

 

Does anyone measure jitter on an AP, I mean really ... you are using a 1Ghz+ scope to measure jitter on a 25-100 Mhz DAC clock right?

 

 

Right, I mean in all fairness, the AP is designed to measure analog signals, not high speed digital...

 

and so ... I can pretty much guarantee that you aren't seeing a 6 dB improvement compared to my 10Gbe switch, and certainly not compared to my 100Gbe switch in which the jitter budget is zero ... also both of these systems have been tested NOT TO PROPAGATE JITTER ... its just not allowed in modern Ethernet. I mean fair enough that some $12 switch is built like crap.

 

Here are some jitter budgets:

https://www.sitime.com/company/news/blog/what-you-need-know-about-phase-noise-and-jitter-high-speed-systems

note that 100Gbe (4x25) is ) 0.061 picoseconds ;) 

 

In all fairness to the EtherREGEN, my professional switches retail for >$30k (I paid a very small fraction). But they have dual SMPS PSUs and similarly my 100Gbe NICs are also powered off a bod standard server PSU via the PCIe bus...  You can't even measure the low jitter (<  61 femtoseconds) on these puppies ;) 

 

Ok, so let's forget this TP-Link or Trendnet whatever generic ancient spec Ethernet stuff, and at the very least compare against a very old Cisco device (I mean assuming you are looking at 100m Ethernet which spec is circa 1995 and is officially on "Legacy" status with the IEEE)

 

I would be interested in exploring whether there is any objectively measurable reason behind my listening preference for the ER vs. Cisco 2960, and for the ER by itself vs. the 2960 followed by the ER. While the "bog standard" SMPSs may not cause jitter or noise over Ethernet, I wonder what they may do wrt noise running over system component ground planes.

One never knows, do one? - Fats Waller

The fairest thing we can experience is the mysterious. It is the fundamental emotion which stands at the cradle of true art and true science. - Einstein

Computer, Audirvana -> optical Ethernet to Fitlet3 -> Fibbr Alpha Optical USB -> iFi NEO iDSD DAC -> Apollon Audio 1ET400A Mini (Purifi based) -> Vandersteen 3A Signature.

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25 minutes ago, Jud said:

 

I would be interested in exploring whether there is any objectively measurable reason behind my listening preference for the ER vs. Cisco 2960, and for the ER by itself vs. the 2960 followed by the ER. While the "bog standard" SMPSs may not cause jitter or noise over Ethernet, I wonder what they may do wrt noise running over system component ground planes.

 

I don’t have a Cisco 2960 but presumably JS could test this against the EtherREGEN and show us if the DAC clock has less jitter. 
 

There are SMPS and there are SMPS ... I’m saying that the Mellanox SMPS obviously causes <60 femtosecond jitter in the 100Gbe switch ... and they are at 400Gbe so imagine how low jitter those systems are and yet still powered by SMPS ;) 

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3 hours ago, Jud said:

While the "bog standard" SMPSs may not cause jitter or noise over Ethernet, I wonder what they may do wrt noise running over system component ground planes.


You can also measure the spectrum of noise on the ground plane — this is easier but use a spectrum analyzer that can do sub-Hz measurements. eg 0- 10kHz or so ....

 

Thats a simple measurement with the right analyzer.

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2 hours ago, jabbr said:

 

I don’t have a Cisco 2960 but presumably JS could test this against the EtherREGEN and show us if the DAC clock has less jitter. 
 

There are SMPS and there are SMPS ... I’m saying that the Mellanox SMPS obviously causes <60 femtosecond jitter in the 100Gbe switch ... and they are at 400Gbe so imagine how low jitter those systems are and yet still powered by SMPS ;) 

 

wish i had a 100Gbe switch  :)

 

is there a similar jitter spec that 1Gb and 100Mb switches must meet?

does anyone know what typical Fios router/switches have for jitter?

 

and to follow up on superdad's comment above, does the ASR's a/d converter really have a 600ns jitter spec and, if so, does that invalidate the ASR measurements of jitter? 

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5 hours ago, cat6man said:

and to follow up on superdad's comment above, does the ASR's a/d converter really have a 600ns jitter spec and, if so, does that invalidate the ASR measurements of jitter? 

 

If you want to learn more have a look at this short informative video.

 

 

 

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7 hours ago, cat6man said:

 

wish i had a 100Gbe switch  :)

 

learning Sonic — Linux for switches ;) 

Quote

 

is there a similar jitter spec that 1Gb and 100Mb switches must meet?

 

Not really, the 10GBase-X specs were the first to define end to end conformance testing (using eye patterns) which means everyone needs to play nice together — obviously if jitter were additive, then serial hops would blow the eye pattern — thankfully the Internet works ;) 

 

Again there is a role for EtherREGEN as a high quality slow Ethernet switch. If anything avoiding common mode noise may be more important that jitter — lets see!

 

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does anyone know what typical Fios router/switches have for jitter?

 

and to follow up on superdad's comment above, does the ASR's a/d converter really have a 600ns jitter spec and, if so, does that invalidate the ASR measurements of jitter? 

There are different ways to measure jitter — eg  looking for pure tone widening , but again I’d simply look at the ground plane noise spectrum because if the switch doesn’t dump noise on the receiver ground plane hen the argument is moot, or if it does then whether by reducing common mode noise or jitter is subject to further measurements. 

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24 minutes ago, Archimago said:

What we need to see are John Swenson's measurements from DACs - if he ever shows them. I would not hold my breath.

 

 

You're aware that measurements made in normal mode probably won't show anything on the DAC's output are you? Isolation brings reductions in common-mode noise and there's no guarantee that'll get converted to normal mode at the DAC's output.

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43 minutes ago, Archimago said:

Show actual differences whether in jitter or noise what a device like this actually does and with what audio gear. Until then, just like the USB Regen, this thing IMO with good certainty will not make any difference.

 Among the other possibilities John's design also brings is a much more convenient way to inject a much cleaner and lower noise power supply than the typically noisy AND poorly regulated +5V SMPS power from the USB port, as well as extend the distance of the USB cable where voltage drop often becomes a problem at >3M length with some USB devices.

 

How a Digital Audio file sounds, or a Digital Video file looks, is governed to a large extent by the Power Supply area. All that Identical Checksums gives is the possibility of REGENERATING the file to close to that of the original file.

PROFILE UPDATED 13-11-2020

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@JohnSwenson: I read your white paper.
 

You have identified the well known nonlinearity as described by Rubiola whereby power supply noise at eg 10Hz causes a frequency offset error in a crystal at f +|- 10Hz. 

 

Ok that’s all correct, however:

 

There is not a well identified inverse nonlinearity whereby phase error an an input f +|- 10 Hz is downconverted to ground plane noise at 10Hz. 
 

If there is switching noise from a gigahertz input Ethernet signal, it will cluster at a gigahertz. 
 

On the other hand common mode noise transmission down a cable could cause 10Hz (or 60Hz) noise in a receiver. 
 

There is no known mechanism to say that 10Hz noise transmission by a gigahertz Ethernet cable has anything to do with Ethernet clock jitter as opposed to common mode noise..

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On 3/12/2020 at 7:36 AM, Superdad said:

 

Except that the funny thing is, while the Audio Precision Amir worships at is a very nice general purpose unit, it is not that well suited to measuring jitter in DACs. What’s that? Heresy!  Yet if you look at the specifications for the ADC in the top-of-the-line APx555, you will see that its own jitter is 600 picoseconds!  So that will swamp the jitter details of a device under test—which might be in the range of 10s of picoseconds--or ideally less.

 

As I've said elsewhere, John has already measured these effects--with a Wavecrest system better suited to this--at the clock pin of DACs. 6dB improvement at 10Hz offset is what he has seen so far with EtherREGEN. Our tests using a custom 32 bit high-speed SAR ADC and analysis s/w--to show things after the DAC will come later. 

 

 Acc'd to Amir (in quotes), you are incorrectly reading the specs, and don't understand his measurements:

..

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."that is a spec for the digital input and output in the analyzer, not "ADC:"

1584062494305.png

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There are three types of digital I/O on APx555: Unbalanced (S/PDIF), Balanced (AES/EBU) and Optical (Toslink). Above is giving the jitter specs for those.

I don't use any of the digital interfaces to measuring jitter. I use the analog output of the DAC which by definition goes into the ADC on the APx555. A spectrum analysis there will then show all jitter sources including the analyzer itself.

 

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