Light Harmonic Geek DAC

[rdsu]

I waste 139.00 on silly stuff. Looking to trying a production model. If it is not so good, someone at my house can plug it into a laptop and play their Beats, Sol Repulics, or Ludicris 'phones into it.

Silly stuff!?

 

You can cancel it...

[Savage]

GEEK: An overachieving headphone amplifier

 

The prototype case is great!

 

I am not sure where their design aesthetic comes from, certainly on a different plane. I do like it a lot, but few cues from the typical Hifi ID. Something more along the lines of a gen1 Ceylon driving a Trans Am.

 

[filhodoassis]

My expectations on GEEK dac are in DSD64, DSD128 and PCM384.

All playback modes where I can upsample in software before sending data to the DAC.

Using Foobar + Sox plugin + SACD plugin - all freeware - or using Miska software.

Can't wait to taste DSD sound on a budget.

[Superdad]

Superdad,

 

Are you sure that PCM1795 must select the sigma-delta, or is optional?

PCM1795 has Advanced Segment architecture, not Sigma-Delta...

 

About USB chip, I will ask Gavin...

 

With TI's Advanced Segment DACs, the upper 6 bits are passed through, while the lower 18 bits are dithered by third-order delta-sigma modulator to the level of a single upper bit. The result is fed to the current-output DAC. Here is the Theory of Operation page from one of TI's other Advanced Segment DACs (the PCM1792):

AdvSegment.pdf

 

And the block diagram from the PCM1795 data sheet:

PCM1795 block.pdf

 

Yet Archimago's test of the Teac DAC with the 1795 does seem to show that the digital filter can be turned off. It is puzzling (so of course I will ask my very smart friend).

 

So while it seems possible that they offer the option to turn off the digital filters (primarily so you can use it with an external one)--and I wish that option was available on some of their newer DACs--I'm skeptical about whether one can turn off the modulator. No matter how you slice it, this is not an R2R ladder DAC, so some portion of the signal is turned 1-bit by a DSM.

[lithium1085]

Infact I remember someone mentioning in one of the TEAC reviews that all the options for filters available in the teac are options provided by the chip itself. Thus the chip perhaps does offer this option.

I am not sure what happens to the modulator though...

[Miska]

Archimago did a very fine review of the Teac 501 Dac witch is based on TI PCM1795.

He tested a NOS available filterless mode.

archimago.blogspot.com/2013/05/measurements-teac-ud-501-pcm-performance.html?m=0

 

It is still not specifically "NOS". It just disables the 8x (352.8/384k) interpolation filter, but the delta-sigma side still oversamples by 64x using sample-and-hold (repeating previous sample 64 times before next one). This is what many DAC chips do, because they don't have enough computing resources to perform proper digital filter to higher than 8x rate.

 

In addition the chip has 6-bit PCM "ladder" side running in parallel to the delta-sigma at the 8x (352.8/384k) digital filter output rate.

 

Output of these two are then combined giving total 66 output levels (IIRC).

[Jud]

It is still not specifically "NOS". It just disables the 8x (352.8/384k) interpolation filter, but the delta-sigma side still oversamples by 64x using sample-and-hold (repeating previous sample 64 times before next one). This is what many DAC chips do, because they don't have enough computing resources to perform proper digital filter to higher than 8x rate.

 

In addition the chip has 6-bit PCM "ladder" side running in parallel to the delta-sigma at the 8x (352.8/384k) digital filter output rate.

 

Output of these two are then combined giving total 66 output levels (IIRC).

 

Grateful thanks for an understandable explanation, so I don't have to make a layperson's uneducated guess about what the datasheet is saying.

[Talos2000]

... but the delta-sigma side still oversamples by 64x using sample-and-hold (repeating previous sample 64 times before next one). This is what many DAC chips do, because they don't have enough computing resources to perform proper digital filter to higher than 8x rate.

 

Thanks for pointing this out. I did not know that. Is there any easy way to establish which DAC chips do this and which ones upsample properly? Maybe you could write a brief post on the subject

[Talos2000]

... No matter how you slice it, this is not an R2R ladder DAC, so some portion of the signal is turned 1-bit by a DSM.

 

Your point is well made. But I just want to observe that a SDM can also output a multi-bit signal, including "N-and-a half-bit" (where zero is an explicitly coded value. Many (most?) DACs already do this, since 1-bit SDMs inherently develop progressively serious stability issues when the noise-shaping filter becomes aggressive enough to generate a desirable SNR. In fact, most SACD DACs will remodulate the incoming 1-bit data to a multi-bit, higher-sample-rate SDM format which is then used for the actual ADC.

[Superdad]

But I just want to observe that a SDM can also output a multi-bit signal, including "N-and-a half-bit" (where zero is an explicitly coded value. Many (most?) DACs already do this, since 1-bit SDMs inherently develop progressively serious stability issues when the noise-shaping filter becomes aggressive enough to generate a desirable SNR.

 

Indeed. In fact my friend was just the other night explaining to me the math of several other SDM coding schemes, some of which are, just as you say, used in popular DACs, and some of which would be very fun to implement and drive other types of circuits to make a DAC.

[Miska]

Thanks for pointing this out. I did not know that. Is there any easy way to establish which DAC chips do this and which ones upsample properly? Maybe you could write a brief post on the subject

 

Overall note "8x filter" means a filter with target rate of 352.8 kHz or 384 kHz. Base rates are 44.1/48k, so those are multiplied by factor of 8, double rates 88.2/96 by 4 and quad rates 176.4/192 by factor of 2 to reach "8x" target rate.

 

After refreshing my memory, one correction to my earlier post regarding TI's architecture. The delta-sigma modulator there operates at 64x and thus has by default oversampling factor of 8x (8 x 8 = 64 total). So it repeats the sample eight times in sample-and-hold. It also supports 16x factor for input rates under 100 kHz, thus reaching overall factor of 128x. It also requires master clock of 256x or higher in order to have enough clock cycles per input sample to do the processing. (see description of register "OS[1:0]: Delta-Sigma Modulator Oversampling Rate Selection" in PCM1792A datasheet)

 

Analog Devices has 8x digital filter, followed by 16x sample-and-hold oversampling delta-sigma modulator.

 

Wolfson uses 8x digital filter, followed by further oversampling by 8x in the delta-sigma modulator using linear interpolation which is only a little bit better than sample-and-hold. This is eventually feeding a conversion stage of 14 weighted parallel 1-bit converters. Thus the converter operates at 2.8/3.1 MHz rate.

 

AKM uses 8x digital filter followed by 16x oversampling delta-sigma modulator, but don't really tell much more. So it operates at 5.6/6.1 MHz.

 

Cirrus Logic doesn't tell about the digital interpolation filter rate, but tells that the overall factor is 128x, so the actual conversion operates at 5.6/6.1 MHz. Based on my measurements, the digital filter is 8x, followed by something like linear interpolation oversampling.

 

NPC Seiko (SM5865) has 8x digital filter followed by max 12x oversampling delta-sigma modulator with 31-level output (30 1-bit converters) for overall factor of max 96x. Operation frequency thus 4.2/4.6 MHz.

 

 

Hopefully I got everything right...

 

P.S. So to answer your question, none on the list upsample properly. In fact I'm not aware of any that would... Master clock frequency would have to be around 786.43 MHz for oversampling factor of 128x. Not a problem for current computers though...

[Miska]

Your point is well made. But I just want to observe that a SDM can also output a multi-bit signal, including "N-and-a half-bit" (where zero is an explicitly coded value. Many (most?) DACs already do this, since 1-bit SDMs inherently develop progressively serious stability issues when the noise-shaping filter becomes aggressive enough to generate a desirable SNR. In fact, most SACD DACs will remodulate the incoming 1-bit data to a multi-bit, higher-sample-rate SDM format which is then used for the actual ADC.

 

Or should we talk about multi-level (as in SDM) to stay distinct from multi-bit (as in PCM). These converters are usually implemented by paralleling 1-bit converters. You can also use these for converting 1-bit DSD without actually remodulating the input. One example of such is TI's implementation.

 

With SDM the source data format doesn't actually have to match the converter layout, it gives you multi-dimensional dynamic freedom operate it in various ways and vary this operation over time as necessary. Much more flexible than fixed-function PCM ladders.

[filhodoassis]

Miska how TI PCM1795 works on DSD mode?

There is some processing on DSD stream to feed the 6bit PCM ladder?

Or the PCM ladder is disabled?

Can it work on DSD256?

Sorry for the DAC design test,

but you are the man with the answers.

Thanks for all the info.

[Miska]

Miska how TI PCM1795 works on DSD mode?

There is some processing on DSD stream to feed the 6bit PCM ladder?

Or the PCM ladder is disabled?

 

Since it is not clearly documented I can only give my estimate how it is done. The ladder side is disabled and the DSD dataflow to the array of 1-bit converters is arranged in four possible different ways, to form the four analog FIR filter options.

 

So the only "processing" would be to define how the DSD bits are assigned to the 1-bit converter array. Their averaging system is borrowed from stock market analysis side...

 

Can it work on DSD256?

 

Based on the datasheet timing values it should be possible.

[Savage]

Anyone have any info on this?

 

They pulled upper-funding levels and cut the numbers produced and haven't been around to answer questions for a few days.

[rdsu]

Anyone have any info on this?

 

They pulled upper-funding levels and cut the numbers produced and haven't been around to answer questions for a few days.

Gavin child was born yesterday...

 

Just give them a few days...

[Jud]

Anyone have any info on this?

 

They pulled upper-funding levels and cut the numbers produced and haven't been around to answer questions for a few days.

 

Have no info.

 

But - Gavin's wife was due to have a baby any day IIANM.

 

They'd exceeded their goal by multiples, and I'm not sure what Kickstarter's rules are on that.

 

So could be quite innocent explanations.

[Savage]

Just surprised to see them pull the upper sales levels and reduce the current level to 300 people from 500

[rdsu]

Some more info about it...

 

Measuring Geek

[lithium1085]

They have 3 options now for different levels of output power - 450 mW, 720 mW and 1000mW all measured at 16 ohm (continuous output)

[tiff_needle]

Thought I should share with you guys Gavin's latest update on GEEK

 

Biggest news in my view is the Output impedance of .47 ohms...

 

"http://www.youtube.com/watch?v=scbrcrojq78

Video Highlights:

 

Geek's output impedance is officially set to 0.47 Ohm. - Must Geek Out: GEEK vs. the Others

2L Records offers Geek Backers discount off any or all titles available in their catalog. - Must Geek Out: Record Label 2L offers Geek Backers Discount on High Resolution Audio Downloads

"

 

PS: I'm not affiliated with Light Harmonics in any way (but hey feel free to drop a Da Vinci dual dac for the advertising... I do need a new dac for my system )

[Booster MPS]

Cool to see insight into the development process with this product. Best press ever.

[lithium1085]

Their entire team has been very approachable and the marketing has been brilliant.....this is definitely worth more than good reviews

[rdsu]

More info, from Larry Ho, about GEEK implementation:

 

Must Geek Out: Measuring Geek

Due to "space" limitation, we could not implement discrete R2R ladder DAC inside. So we choose the DAC IC has has two layers of digital filter/up-sampling. We disable the first 8X layer digital filters in any input sampling rate higher than 96K. (this value may change in final production after more crazy extensive listening tests)

But we need to keep IC's internal up-sampling filter running.

 

So for clarification, Geek is NOT NOS DAC. But we tried our best to make Geek sounds like it... ;-)

 

Must Geek Out: Measuring Geek

Geek will not be NOS. But it will be half blood prince...

It's based on Delta-sigma engine to deal with both PCM and DSD format, like 99% of the market. Even $60K+ DAC does the same thing.

 

As far as I know, Da Vinci Dual DAC is the only one who use separate engines for different music format.

(If anyone knows other product use the same approach, I would be glad to know)

[Jud]

More info, from Larry Ho, about GEEK implementation:

 

Must Geek Out: Measuring Geek

 

 

Must Geek Out: Measuring Geek

 

Ok, so as we thought re NOS claim - which is fine.

 

Re other DACs with different setups for different resolutions, AMR comes to mind.