Xeon processors with obscene amount of cache?

[seeteeyou]

There's a theory about the cache according to @romaz

 

https://www.computeraudiophile.com/forums/topic/30376-a-novel-way-to-massively-improve-the-sq-of-computer-audio-streaming/?page=361&tab=comments#comment-860631

On 8/10/2018 at 2:05 PM, romaz said:

Is it possible that Intel CPUs with their larger cache have lower latency and result in better SQ than ARM CPUs?

 

https://ark.intel.com/products/128992/Intel-Celeron-J4005-Processor-4M-Cache-up-to-2_70-GHz

https://www.computeraudiophile.com/forums/topic/30376-a-novel-way-to-massively-improve-the-sq-of-computer-audio-streaming/?page=361&tab=comments#comment-860642

On 8/10/2018 at 3:01 PM, romaz said:

The significance of this other board is that it incorporates the newer Celeron J4005 processor that has an identical 10w TDP but provides a larger size cache of 2MB per core (as opposed to only 1MB per core with the board I have).  In theory, this should result in even lower latency although whether this results in any real world improvement in SQ is not something I have knowledge of.

 

Then I checked these noteworthy processors from Intel that are good for single-CPU systems, many of them are also providing 2 MB per core while quite a few would give us 2.5 MB per core instead

 

https://ark.intel.com/products/series/59137/Intel-Xeon-Processor-E3-Family

https://ark.intel.com/products/series/78580/Intel-Xeon-Processor-E3-v2-Family

https://ark.intel.com/products/series/78581/Intel-Xeon-Processor-E3-v3-Family

https://ark.intel.com/products/series/87722/Intel-Xeon-Processor-E3-v4-Family

https://ark.intel.com/products/series/88210/Intel-Xeon-Processor-E3-v5-Family

https://ark.intel.com/products/series/97141/Intel-Xeon-Processor-E3-v6-Family

https://ark.intel.com/products/series/123588/Intel-Core-X-series-Processors

https://ark.intel.com/products/series/134928/8th-Generation-Intel-Core-i9-Processors

 

Here's an outlier but it's discontinued a LONG time ago

 

12 MB @ 1 core (12 MB per core)

https://ark.intel.com/products/31791/Intel-Itanium-Processor-9110N-12M-Cache-1_60-GHz-533-MHz-FSB

 

I also looked at AMD Epyc but they're 4 MB per core at most. Now what? Those big shots from Intel (multi-CPU systems) seemed to fair better but even Xeon E5 v3 would max out at 5 MB per core

 

25 MB @ 6 cores (~4 MB per core)
https://ark.intel.com/products/75268/Intel-Xeon-Processor-E5-2643-v2-25M-Cache-3_50-GHz

 

30 MB @ 6 cores (5 MB per core)
https://ark.intel.com/products/85763/Intel-Xeon-Processor-E5-4655-v3-30M-Cache-2-90-GHz-

 

16.5 MB @ 4 cores (~4 MB per core)

https://ark.intel.com/products/120475/Intel-Xeon-Gold-5122-Processor-16-5M-Cache-3-60-GHz-

 

Finally we're left with the "unthinkable" ones but they're costing an arm and a leg

 

37.5 MB @ 6 cores (~6 MB per core)
https://ark.intel.com/products/75260/Intel-Xeon-Processor-E7-8893-v2-37-5M-Cache-3-40-GHz-

 

45 MB @ 4 cores (~11 MB per core)
https://ark.intel.com/products/84688/Intel-Xeon-Processor-E7-8893-v3-45M-Cache-3-20-GHz-

 

60 MB @ 4 cores (15 MB per core)
https://ark.intel.com/products/93791/Intel-Xeon-Processor-E7-8893-v4-60M-Cache-3_20-GHz

 

Have you guys actually tried anything like an AMD Epyc 7301 or 7351P by any chance? I also saw plenty of Xeon E5-2643 v2 on eBay and they're starting at $140 or so.

 

Once we've got the heat dissipation taken care of, I wonder if an obscene amount of cache were actually making a difference or otherwise?

[shadowlight]

HQPlayer author has said the more cache that you have the better HQPlayer performs, especially some of the extreme filters/modulators.  No stutter

[PeterSt]

A lot of cache is nice, if you can utilize it. This depends on the application and is quite out of your control anyway.

However ...

The larger the cache, the more memory must be copied at task switching (which happens millions of times per second).

 

So my approach would be to have lower amounts of cache per core. Or, to prevent tack switching ...

(In the Stealth Mach III PC we use Xeons with 1.375MB cache per native core (like 16 of them))

[plissken]

The short answer is no. SQ is not going to be determined by this. As long as the DAC receives the data it's supposed to it doesn't matter.

 

Where the # of calculations matter is when you are using the computer for applying sampling and filters.

 

[rickca]

10 hours ago, PeterSt said:

Or, to prevent tack switching ...

(In the Stealth Mach III PC we use Xeons with 1.375MB cache per native core (like 16 of them))

That's kind of an expensive solution to avoid task switching!

[yamamoto2002]

Zen+ Threadripper has 8MB L3 per CCX(8 core/16T CPU complex). This 8MB L3 cache is useful to accommodate large FFT kernel.

 

CPU fan is loud so it is not suitable for music playback IMO.

 

[yamamoto2002]

Found my i7-8700K has 12MB shared L3 cache.

 

FIR optimization strategy for large kernel

 

For Intel i7-8700K: monolithic FIR coefficients to share to all the core, Max 12MB FIR kernel can be cached on the CPU.

 

 

For AMD 2990WX : FIR kernel split to 8 and distribute them to 8 CCX and convolute in parallel. Max 64MB FIR kernel can be cached on the CPU.

 

Logical Processor to Cache Map:
**----------  Data Cache          0, Level 1,   32 KB, Assoc   8, LineSize  64
**----------  Instruction Cache   0, Level 1,   32 KB, Assoc   8, LineSize  64
**----------  Unified Cache       0, Level 2,  256 KB, Assoc   4, LineSize  64
************  Unified Cache       1, Level 3,   12 MB, Assoc  16, LineSize  64
--**--------  Data Cache          1, Level 1,   32 KB, Assoc   8, LineSize  64
--**--------  Instruction Cache   1, Level 1,   32 KB, Assoc   8, LineSize  64
--**--------  Unified Cache       2, Level 2,  256 KB, Assoc   4, LineSize  64
----**------  Data Cache          2, Level 1,   32 KB, Assoc   8, LineSize  64
----**------  Instruction Cache   2, Level 1,   32 KB, Assoc   8, LineSize  64
----**------  Unified Cache       3, Level 2,  256 KB, Assoc   4, LineSize  64
------**----  Data Cache          3, Level 1,   32 KB, Assoc   8, LineSize  64
------**----  Instruction Cache   3, Level 1,   32 KB, Assoc   8, LineSize  64
------**----  Unified Cache       4, Level 2,  256 KB, Assoc   4, LineSize  64
--------**--  Data Cache          4, Level 1,   32 KB, Assoc   8, LineSize  64
--------**--  Instruction Cache   4, Level 1,   32 KB, Assoc   8, LineSize  64
--------**--  Unified Cache       5, Level 2,  256 KB, Assoc   4, LineSize  64
----------**  Data Cache          5, Level 1,   32 KB, Assoc   8, LineSize  64
----------**  Instruction Cache   5, Level 1,   32 KB, Assoc   8, LineSize  64
----------**  Unified Cache       6, Level 2,  256 KB, Assoc   4, LineSize  64

 

[Miska]

On 9/29/2018 at 7:15 AM, PeterSt said:

A lot of cache is nice, if you can utilize it. This depends on the application and is quite out of your control anyway.

However ...

The larger the cache, the more memory must be copied at task switching (which happens millions of times per second).

 

So my approach would be to have lower amounts of cache per core. Or, to prevent tack switching ...

 

Task switching is very efficient, and you certainly don't do it millions of times per second. If you don't have other processes running, you don't even need to task switch. HyperThreading is designed to help on cache fetches, because it can save context switching time for a process that is waiting for data to be delivered from RAM to the cache/CPU. Because CPU can run the non-waiting task instead (if there is any, in first place).

 

Cache can make a difference whether you can run a certain filter to some rate or not...

This doesn't have anything to do with sound quality, but just processor load and efficiency.