Intel CPUs Don’t Support ECC Memory: How Bad For A/V Quality?

[KeenObserver]

I think it is misleading to say that Intel does not support ECC memory.

There are enterprise computers and the are consumer computers.  I would say that the consumer chose not to spend the extra money to populate their computers with ECC memory.

If one so chose, one could spend the extra money to build a computer with ECC memory.  I built a Pentium Pro workstation a number of years ago that was populated with ECC memory.  I have subsequently built a number of workstations, most recently with Xeon processors, that were populated with ECC memory.

A good deal of the high end consumer computers today are used for gaming.

[jabbr]

On 1/20/2021 at 12:02 PM, StreamFidelity said:

 

Sorry for off topic

 

Intel® Xeon® W-2245 Processor
- Processor Base Frequency 3.90 GHz
- Max Turbo Frequency 4.50 GHz

 

As far as I know, the AVX 512 CPU drops back to the base clock. Is that enough for the modulator ASDM7EC with DSD 256?

Yes ... I posted what I hope are detailed enough benchmarks on the W-2245 running HQPlayer awhile ago 

[jabbr]

On 1/20/2021 at 8:56 AM, John Dyson said:

You are right about ECC, but X CPUs do have lots of lanes.  (AFAIR around 40 or more.)

 

John

Yes, you are correct. I get confused with the 10200*K* which has a higher click speed but not enough PCIe lanes.... 

[jabbr]

16 hours ago, jabbr said:

Yes, you are correct. I get confused with the 10200*K* which has a higher click speed but not enough PCIe lanes.... 

 

I meant the i9-10900K ... oh god these numbers and letters have me lost...

[John Dyson]

On 1/23/2021 at 9:42 AM, jabbr said:

 

I meant the i9-10900K ... oh god these numbers and letters have me lost...

X looks like K, almost.

The tradeoff of X vs K is X has more cache per core, AVX512, but K has a slightly faster clock rate on average and has slightly higher temp limit.

[Miska]

17 hours ago, John Dyson said:

X looks like K, almost.

The tradeoff of X vs K is X has more cache per core, AVX512, but K has a slightly faster clock rate on average and has slightly higher temp limit.

 

X has twice as many memory channels giving twice the memory bandwidth (and max capacity). X also has much more PCIe lanes.

 

[John Dyson]

On 1/27/2021 at 12:00 PM, Miska said:

 

X has twice as many memory channels giving twice the memory bandwidth (and max capacity). X also has much more PCIe lanes.

 

Yes, but very interesting (to me), with the super memory/CPU intense DHNRDS software -- using two vs four channels on my machine made almost no difference.  The PCIE lanes might make a big difference for those with lots of I/O devices and needing lots of I/O speed.    More memory channels might be more important for cases when raw memory copies pf DIFFERENT memory  are done at high rates, but most code isn't that simple.   Most code uses the same memory over and over again (therefore bigger cache at similar speed is likely more imporant.)

I got the X vs K, mostly for the curiosity about AVX512, and being able to support  it for the future when AVX512 might actually help a lot for newer processors.   I use a very very efficient SIMD compiler, along with the way that the software is written, that AVX512 SHOULD produce a big speedup. but because of the limitations of the 10th & earlier generaltion X CPUS (and Xeons), AVX512 is mostly just 'more instructions', but not really gaining much from 512bit operations.   I even checked the generated code for AVX512, and  it is about as efficient as one can reasonably expect.  There is a LOT of code in DHNRDS that 512bit operations SHOULD speed things up, but doesn't.  (BTW, the compiler is LLVM/CLANG -- for my purposes, leaves GCC & Intel compilers in the dust.)

 

* I hard coded a bunch of SIMD operations -- but the very efficient hard coded ASM operationts end to slow down the code,  because the compiler optimization is more weak when using inline asm.   I was really surprised about that, because my inline asms were maximally efficient.

 

There are so many 'features' which are of secondary advantage for most situations.   48 lanes of PCIE is probably the strongest impactful advantage for big machines.   I like the big cache also -- the DHNRDS does do lot of memory transfers, but does so with the same memory over and over again.   I would expect most useful software (esp for audio) are more of the 'use same memory over and over again' instead of massive transfers of different memory (e.g. FIR filters, most math).   Therefore 'cpu-local cache size' probably trumps 'memory lanes' for audio-type of applications.   More lanes DOES make differences in benchmarks.

 

 

 

 

[Miska]

I see benefit in more memory channels and faster memory. And also in low CL memory...

 

For some algorithms GPUs still do even better job with their 512-bit or similar very high bandwidth memory and lot of processing units. This is also where PCIe lanes become handy.

 

[Gregory]

On 1/15/2021 at 11:01 AM, yamamoto2002 said:

This means, if you have one PC which is used 8 hours a day sees one ECC error event in 50 years to 83 years of operation.

 

That's an average, but if you ram flips bits, it has probably a permanent damage.

It happened to me on my NAS, It started to report ECC errors, they never went away, always at the same address. I had to replace one memory bank. Memory was running at normal speed and normal voltage, no overclocking.

 

It can be a good idea to use MemTest86 once in a while on your machine for an extended period of time (24h or more) to check the ram.