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Intel CPUs Don’t Support ECC Memory: How Bad For A/V Quality?


lisa

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This discussion may only serve to reveal my less than complete knowledge of A/V digital signal processing rather than raise questions which audibly or not impact signal quality. However, the concerns raised stem from here. https://www.google.com/amp/s/arstechnica.com/gadgets/2021/01/linus-torvalds-blames-intel-for-lack-of-ecc-ram-in-consumer-pcs/%3famp=1

 

The report initially describes and quotes Mr. Torvalds’ contempt for Intel’s refusal to support error correcting ECC memory which apparently impacts his interest with server hardware, computational computing and other non-home theater related tasks. But later discussed are claims, though unspecified, where consumers-presumably home users-can also suffer from non-ECC memory generated errors.

 

Thus, if the lack of ECC memory would leave the computer audiophile vulnerable to errors, however infrequent, in what form would they be? Would they manifest as permanent audible “clicks” during the re-digitizing of music in 24 bit audio and/or when downloaded from stores like https://www.hdtracks.com/ ?

 

Has anyone experienced this? If not perhaps because such errors may be even more noticeable and more frequently occurring from much more common be still respectably sounding 16 bit audio?

 

OTOH, would such errors be more noticeable if downloading or playing 1080p or especially 4K video, though both requiring far more digital bandwidth (e.g. bit depth?) than even 24 bit audio? However, the ears are likely more sensitive than the eyes to digital audio errors.

 

In any case, do AMD brand Ryzen CPUs and motherboards support ECC memory?

 

And which if any other motherboard brands do also?

 

But if so would such consumer desktop systems tend to create more heat induced fan noise than desktops with comparable Intel CPUs and motherboards performing the same kinds of work loads, such as 1080p video editing-and full length movie playbacks via https://jriver.com/overview.html ?

 

 

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  • lisa changed the title to Intel CPUs Don’t Support ECC Memory: How Bad For A/V Quality?

AMD does not support ECC memory.

 

To get ECC you just need to use XEON processors.  ECC memory then becomes an option.  The systems are usually a bit more expensive and choices can be limiting, i.e., no designer laptops but the availability is present.

 

Have no idea if memory errors, if they actually occur, are detrimental to sound quality.

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9 minutes ago, danadam said:

Cursory google query suggests otherwise.

You can USE ECC memory...AMD does NOT support it.

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14 hours ago, lisa said:

Would they manifest as permanent audible “clicks” during the re-digitizing of music in 24 bit audio and/or when downloaded from stores like https://www.hdtracks.com/ ?

(AFAIK, AFAICT)

 

When audible, they would be "clicks", yes. If they are permanent or audible, it depends.

 

If you were downloading a wav file and a bit-flip happened before the file is stored on disk, then the bit-flip would be permanent but possibly inaudible (see below).

If you were downloading a flac file and a bit-flip happened before the file is stored on disk, then the bit-flip would be permanent, but when played the player should detect it, because flac files contain control sums.

If you played a file and a bit-flip happened after the file is loaded into memory, then the bit-flip would not be permanent. You can just reload the file.

 

As for audibility, it depends on which bit in a sample was flipped and the loudness of the passage. A flip of a more significant bit will be more audible than a flip of a less significant bit. Flips in quiet passages will be more audible than flips in loud passages.

 

Here's a guitar chord (16/44, generated by SoX) and examples of bit flips (bits counted from 1). At volume levels that I listen to it and in this specific sample, the flips in bits less significant than 9 are inaudible to me:

bit_flips_examples.zip

 

bit_flips.thumb.png.c1f3954c6d95e6544df27516a3254340.png

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I read some forum post about ECC DRAM soft error event log. In a datacenter DRAM bit upset is real problem and need to be resolved with ECC. His datacenter, which operates 1000 PCs of 24/7, observes 3 to 5 ECC soft error events (1bit flipped and safely corrected by ECC mechanism) in one month. On this case, ECC memory is must have feature.

 

This means, if you have one PC which is used 8 hours a day sees one ECC error event in 50 years to 83 years of operation.

 

I read somewhere, on March 2011, a datacenter near Fukushima observed more frequent than usual DRAM soft error events, probably due to flying particle from the reactor...

 

If you have Windows computer with ECC DRAM support, be sure to check DRAM periodical scrub  settings of BIOS. Computer generates machine check exception logs when soft error event occurs and ECC error correction event can be viewed on Windows event viewer.

 

IIRC about 15 to 20 years ago Microsoft released some document of their investigation about Blue Screen of Death cause, which says some portion of the kernel crash is caused by uncorrected DRAM bit upset of non-ECC DRAM but I cannot find the article now

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21 hours ago, jcbenten said:

You can USE ECC memory...AMD does NOT support it.

AMD confirms that Ryzen supports ECC memory | OC3D News (overclock3d.net)

 

NOT TRUE! One needs to really do research first.

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30 minutes ago, botrytis said:

AMD confirms that Ryzen supports ECC memory | OC3D News (overclock3d.net)

 

NOT TRUE! One needs to really do research first.

From your link:  "Instead of simply disabling ECC support altogether, AMD has instead opted to allow motherboards to support the standard as they see fit, allowing consumers to take full advantage of ECC memory when using a compatible motherboard."

 

AMD is leaving it up to the MB makers to support.  Support is just not using...it also entails aftermarket issues.  Implement at your own risk.

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On 1/15/2021 at 7:28 PM, jcbenten said:

AMD is leaving it up to the MB makers to support.  Support is just not using...it also entails aftermarket issues.  Implement at your own risk.

 

I think AMD EPYC CPU's have always supported ECC. And have also things like memory encryption. Threadripper versions also gained support for the memory encryption part.

 

Signalyst - Developer of HQPlayer

Pulse & Fidelity - Software Defined Amplifiers

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11 hours ago, Miska said:

 

I think AMD EPYC CPU's have always supported ECC. And have also things like memory encryption. Threadripper versions also gained support for the memory encryption part.

 

Intel Xeon also always supports ECC, that is part of the market differentiation.   I'd rather have ECC, but it is all in the mix of tradeoffs.   If I had more than 64G, I'd almost definitely go for ECC, because the stats get worse.   At 256G, there is no question.   I only have 32G -- so raw memory is reliable enough for me.   I have a  10900X processor, and if I had to tradeoff with a 6core processor with ECC -- I'd take the 10900X.   One item of note -- I have an application that easily takes all 10 cores, not all people are pushing things so hard.   Frankly, Id even prefer a 16 or 18 core machine.

 

John

 

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7 hours ago, John Dyson said:

Intel Xeon also always supports ECC, that is part of the market differentiation.   I'd rather have ECC, but it is all in the mix of tradeoffs.   If I had more than 64G, I'd almost definitely go for ECC, because the stats get worse.   At 256G, there is no question.   I only have 32G -- so raw memory is reliable enough for me.   I have a  10900X processor, and if I had to tradeoff with a 6core processor with ECC -- I'd take the 10900X.   One item of note -- I have an application that easily takes all 10 cores, not all people are pushing things so hard.   Frankly, Id even prefer a 16 or 18 core machine.

 

In addition, Xeons support much larger RAM installations and have double the number of memory channels compared to regular desktop CPU models (except some X-series and such CPUs).

 

My previous development workstation was Xeon E5 with 32 GB of ECC RAM and it supported up to 768 GB of RAM.

 

My current development workstation has Xeon W-2245 with 64 GB of ECC RAM and it supports up to 1 TB of RAM. In addition, it has AVX-512 support which has been lacking from the regular desktop CPUs.

 

Signalyst - Developer of HQPlayer

Pulse & Fidelity - Software Defined Amplifiers

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2 hours ago, Miska said:

 

In addition, Xeons support much larger RAM installations and have double the number of memory channels compared to regular desktop CPU models (except some X-series and such CPUs).

 

My previous development workstation was Xeon E5 with 32 GB of ECC RAM and it supported up to 768 GB of RAM.

 

My current development workstation has Xeon W-2245 with 64 GB of ECC RAM and it supports up to 1 TB of RAM. In addition, it has AVX-512 support which has been lacking from the regular desktop CPUs.

 

My X processor has AVX512 also -- but when I run the DHNRDS on it, using a well ported AVX512 version versus the well ported AVX2 makes little difference in performance.  In fact, the current generations of CPUS slow down when using AVX 512.    I have been thinking about doing tests where using the AVX512 instruction set ONLY for the long FIR filters and Hilbert transforms, but I'd suspect that the slowdown when using AVX512 would persist long enough to also slow down when running AVX2 instrs.  (the reason for using AVX512 for some of the FIR filters is that 512bits at a time might help a little.)

 

Other than a few improvements in cycles per instruction, he big advantage to the newer processors is more flexibility in the math units, so there can be more operations done in parallel.   The effect isn't major (perhaps 20%), but it does help.

The other advantage to the bigger processors (including X processors) is more I/O lanes for more sustained I/O bandwidth.   There is NO WAY that I am pushing the PCI I/O bandwidth, but it is nice to be able to take better advantage if I ever need.

 

When I upgraded from 2 lanes to 4 lanes of memory, I detected nil performance improvement, even with my fully saturating, multi-threaded program.   I believe that the bigger cache on the X and Xeon processors might just be more helpful than memory lanes -- for normal programs.

 

For big machines, you REALLY DO want ECC.

Also, if you really do not need AVX512 and dont need more than 10 cores, I'd suggest the 10900K for the 10th generation, or wait for the 11th generation. (Or, try AMD.)

 

John

 

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50 minutes ago, John Dyson said:

My X processor has AVX512 also -- but when I run the DHNRDS on it, using a well ported AVX512 version versus the well ported AVX2 makes little difference in performance.  In fact, the current generations of CPUS slow down when using AVX 512.    I have been thinking about doing tests where using the AVX512 instruction set ONLY for the long FIR filters and Hilbert transforms, but I'd suspect that the slowdown when using AVX512 would persist long enough to also slow down when running AVX2 instrs.  (the reason for using AVX512 for some of the FIR filters is that 512bits at a time might help a little.)

 

For me W-2245 can do about the same with lower clocks and AVX-512 as i9-9900KS can do running all-core 5 GHz and AVX2. Plus I win a lot of memory bandwidth and PCIe lanes, and ECC support.

 

53 minutes ago, John Dyson said:

Also, if you really do not need AVX512 and dont need more than 10 cores, I'd suggest the 10900K for the 10th generation, or wait for the 11th generation. (Or, try AMD.)

 

Of recent CPU's I have 9900KS and 10900K as well. And now AMD's 5800X. But the AMD is not quite as good on modulator workloads.

 

OTOH, all my workloads are realtime processing. And full saturation would mean drop-outs, and on most CPUs (apart from 9900KS) it also means that you are not getting benefit from turbo. And turbo is essential to get high enough clocks.

 

Signalyst - Developer of HQPlayer

Pulse & Fidelity - Software Defined Amplifiers

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8 minutes ago, Miska said:

 

For me W-2245 can do about the same with lower clocks and AVX-512 as i9-9900KS can do running all-core 5 GHz and AVX2. Plus I win a lot of memory bandwidth and PCIe lanes, and ECC support.

 

 

Of recent CPU's I have 9900KS and 10900K as well. And now AMD's 5800X. But the AMD is not quite as good on modulator workloads.

 

OTOH, all my workloads are realtime processing. And full saturation would mean drop-outs, and on most CPUs (apart from 9900KS) it also means that you are not getting benefit from turbo. And turbo is essential to get high enough clocks.

 

 

Agreed. There are details for different CPUs but nothing can do more than sinc-M/ASDM7EC at DSD256. When I run this along with DHNRDS I can only do DSD128 without dropouts.

 

For me, another advantage of the Xeon-W is that it has enough PCIe-3 lanes that I can run both CUDA GPU and 100Gbe Ethernet. The non Xeon Intel CPUs both can't do ECC nor have enough PCIe lanes for me.

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On 1/14/2021 at 1:26 PM, jcbenten said:

AMD does not support ECC memory.

Not officially but it does on certain boards, running a 3700X right now with 128 ECC. AMD EPYC (the server chip, like xeons) fully support ECC

 

On 1/14/2021 at 1:26 PM, jcbenten said:

 

Have no idea if memory errors, if they actually occur, are detrimental to sound quality.

It actually occurs very rarely with solar storms mainly or when memory is malfunctioning or overclocked or under voltaged. But the occurrence will affect usually 1 bit which I doubt you will notice. The real danger is data corruption when written to disk but for our audio pcs playing audio I would say it is irrelevant.

 

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What a coincidence, running right now a hammer test with memtest on ecc memory just purchased for a truenas machine I built, for nas and data servers it is critical. Mainly because when you use raid you do scrubs and relocate data and backup data constantly and use cache and other intermediate steps which increases the risk of data corruption since your data is read and written more often.

 

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14 hours ago, jabbr said:

 

Agreed. There are details for different CPUs but nothing can do more than sinc-M/ASDM7EC at DSD256. When I run this along with DHNRDS I can only do DSD128 without dropouts.

 

For me, another advantage of the Xeon-W is that it has enough PCIe-3 lanes that I can run both CUDA GPU and 100Gbe Ethernet. The non Xeon Intel CPUs both can't do ECC nor have enough PCIe lanes for me.

Good news -- (slightly off topic) -- the new version of DHNRDS in a few days is faster, perhaps about 10-20% at higher quality, but substantially more in --normal mode.   (Got rid of cruft and stupid code.)

 

Bottom line -- on smaller machines, esp moderately tested software like DHNRDS, the SW quality trumps HW ECC.   However as mentioned elsewhere, servers, esp that do scrubbing and stuff like that -- ECC is critical.   That is -- of course, make sure that the memory is good, and the system speed isnt pushed too hard.

 

John

 

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14 hours ago, jabbr said:

 

Agreed. There are details for different CPUs but nothing can do more than sinc-M/ASDM7EC at DSD256. When I run this along with DHNRDS I can only do DSD128 without dropouts.

 

For me, another advantage of the Xeon-W is that it has enough PCIe-3 lanes that I can run both CUDA GPU and 100Gbe Ethernet. The non Xeon Intel CPUs both can't do ECC nor have enough PCIe lanes for me.

You are right about ECC, but X CPUs do have lots of lanes.  (AFAIR around 40 or more.)

 

John

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11 hours ago, luisma said:

Not officially but it does on certain boards, running a 3700X right now with 128 ECC. AMD EPYC (the server chip, like xeons) fully support ECC

 

It actually occurs very rarely with solar storms mainly or when memory is malfunctioning or overclocked or under voltaged. But the occurrence will affect usually 1 bit which I doubt you will notice. The real danger is data corruption when written to disk but for our audio pcs playing audio I would say it is irrelevant.

 

I repeat...two meanings of support:

1) AMD supports meaning you can use ECC memory if you wish.

2) IF you have issues (compatibility, etc) AMD DOES NOT SUPPORT.  You will have to work with your MB supplier.

 

I, personally, do not think one would have an issue using ECC but there is a risk, however small that risk is.

 

Here is my extreme example to illustrate my point:  @Miska sells and supports after the sell.  There are thousands of pages on this forum of him doing just that. 

 

What if he decided to sell all his software through retail and said "IF any issue, talk to your vendor. I will not help you."  This is what AMD is doing.

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@jcbenten you are correct on your last post

50 minutes ago, jcbenten said:

I repeat...two meanings of support:

1) AMD supports meaning you can use ECC memory if you wish.

2) IF you have issues (compatibility, etc) AMD DOES NOT SUPPORT.  You will have to work with your MB supplier.

 

The only reason I quoted you before is because your first post stating

On 1/14/2021 at 1:26 PM, jcbenten said:

To get ECC you just need to use XEON processors

Which seemed inaccurate to me as EPYC (same as Xeon) fully supports it, then later on you clarified some other topics, I started reading from the top of the thread, did not check the ones below and replied before reading the rest.

 

 

 

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17 hours ago, Miska said:

For me W-2245 can do about the same with lower clocks and AVX-512 as i9-9900KS can do running all-core 5 GHz and AVX2.

 

Sorry for off topic

 

Intel® Xeon® W-2245 Processor
- Processor Base Frequency 3.90 GHz
- Max Turbo Frequency 4.50 GHz

 

As far as I know, the AVX 512 CPU drops back to the base clock. Is that enough for the modulator ASDM7EC with DSD 256?

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6 hours ago, StreamFidelity said:

Intel® Xeon® W-2245 Processor
- Processor Base Frequency 3.90 GHz
- Max Turbo Frequency 4.50 GHz

 

As far as I know, the AVX 512 CPU drops back to the base clock. Is that enough for the modulator ASDM7EC with DSD 256?

 

Yes, I think it does it because of TDP limit. But yes, ASDM7EC works fine with it, with about 90% core load on the modulator cores. I offload filters to the RTX 2080 GPU, but running also filters on the CPU works fine. But offloading the filters leaves plenty of CPU time for running compilers and other development stuff.

 

Signalyst - Developer of HQPlayer

Pulse & Fidelity - Software Defined Amplifiers

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13 hours ago, Miska said:

 

Yes, I think it does it because of TDP limit. But yes, ASDM7EC works fine with it, with about 90% core load on the modulator cores. I offload filters to the RTX 2080 GPU, but running also filters on the CPU works fine. But offloading the filters leaves plenty of CPU time for running compilers and other development stuff.

 

I have carefully watched the CPU temperatures, and the AVX512 seems to blindly slow down the CPU, TDP limit or not.   It also seems to be partially related to the 'C' power modes.   I could eek out a bit more performance (AVX512) by tuning the CPU controls, but not by much.   Of course, I am not a speed-tweaker, so that kind of thing is out of the question for me.   (Stability and standardization, with or without ECC are important to me.)

 

I could consider offloading the expensive DHNRDS filtering to a parallel CPU, but many people who complain about the application speed being terrible aren't even using AVX2 machines.*     Since I have perfected the algorithms, fully understanding what is needed , and since there is a pipelined nature to the program (pipelined through threads), perhaps 4 long Hilbert transforms (FIR filters) in 8 or 16 threads could be done in parallel.

 

*everyone DOES complain about the speed, but those who are using 2 or 4 core SSE2 machines are most likely not going to be very happy in the higher quality modes.

 

So, on the DHNRDS program, it might be possible to do 32 or 64 1000->2000 tap Hilbert transforms in parallel, pipelined in batches of 4 transforms.   (I need to publish the algorithm before someone else figures it out -- it is just becoming practical to use with our fast CPUs today.)

 

I do wish I could have afforded 18 cores...

 

 

 

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