Food for thought: How does jitter affect DSD DACs?

[jabbr]

22 minutes ago, beerandmusic said:

^^^ besides DAC power, (e.g. streamer or source power) does power matter so much (if at all) if you do gigabit fiber?

 

I mean if you get good ps for dac and you use gigabit fiber, do you need to be concerned with server and/or streamer power.

 

I don’t worry about server PSU at all. Nada.

 

Since my streamer/NAA is connected by USB to my DAC, I do use LPS.

 

If you are concerned about server noise issues despite connecting your DAC via optical in order:

1) connect server to switch via optical (2 hops of isolation)

2) get a 10Gbe switch

3) use singlemode fiber 

 

ie server PSU is low enough on my list of priorities that I don’t bother

[Miska]

3 hours ago, jabbr said:

But aside from phase noise : all this noise, crosstalk etc has a direct effect on the DAC output and dB for dB I’d bet that the direct effects of noise sources are more impactful than the effect via the crystal — or at least it’s all important 

 

Yes, that's also what I've been trying to say...

 

When the conversion runs off the WCLK, it doesn't have the benefit of proportional effect like in high rate clocks, so you need to be more careful. So if you get modulated by for example +-50 Hz the effect is different. But just plain natural phase noise - not much difference.

 

[Superdad]

4 hours ago, jabbr said:

Thats for sharing your testing because this shows us all how a DAC designer measures and listens and how improvements are both measurable and pleasurable!

 

“Measurable and pleasurable”—I like that! You’re a regular rhymin’ Simon sir Jonathan. 

[Arpiben]

@jabbr 

 

How much realistic phase noise would you like to have at DAC oscillator level in dBc/1 Hz @45.1/49.1/100 MHz?

How much realistic phase noise would you like to have at DAC output level in dBc/1 Hz @ 1 kHz/10 kHz ?

 

I still have a lot of homework to do before figuring out myself the real needs of such ultra low noise in audio applications.

Several years ago I used to measure phase noise for earth satellite telecom equipment. Nowadays  I admit we have more restrictions in terms of phase noise requirements especially when dealing with high modulation schemes. But I am still quite sceptical about the values involved in audio...

Therefore I am asking and not challenging somebody who seems to have spent quite some time with those aspects. 

Thanks.

 

[Ralf11]

-140 dB has got to be just fine

 

 

Beer - consider the various routes by which server noise could possibly reach the DAC:

1. along the signal cable - optical eliminates this, as does WiFi

2. radiated RFI - distance solves this (tho maybe the inverse square law is not quite achieved)

3. along the AC wiring - again, distance (plus you can do other things)

 

 

[jabbr]

7 minutes ago, Arpiben said:

@jabbr 

 

How much realistic phase noise would you like to have at DAC oscillator level in dBc/1 Hz @45.1/49.1/100 MHz?

How much realistic phase noise would you like to have at DAC output level in dBc/1 Hz @ 1 kHz/10 kHz ?

 

I still have a lot of homework to do before figuring out myself the real needs of such ultra low noise in audio applications.

Several years ago I used to measure phase noise for earth satellite telecom equipment. Nowadays  I admit we have more restrictions in terms of phase noise requirements especially when dealing with high modulation schemes. But I am still quite sceptical about the values involved in audio...

Therefore I am asking and not challenging somebody who seems to have spent quite some time with those aspects. 

Thanks.

 

 

I have my own biases and part of my interest in looking at this from a quantitative perspective is to see if I can justify my impressions.

 

From a logical point of view, if the effect on the output is <120 dB or noise floor of the DAC then hard to see how it would be audible. Also phase noise is only one type of noise.

 

At the current state of affairs, clocks have outpaced the rest of the electronics, so really in a DAC you can be comfortable using something as easy to obtain as a Crystek 575 or similar and not worry about the clock itself.

 

Can still look at ways to decrease 1/f power supply noise (I started a thread about 1/f awhile ago -- again 1/f noise is what is behind the increased phase noise in the close-in range). Similarly avoid crosstalk and other sources of noise.

 

I think the biggest area that hasn't been addressed is noise in the DAC circuitry itself, specifically intrinsic logic switching noise and intrinsic logic phase noise -- this isn't simply phase noise (though Rubiola et al have related intrinsic logic phase noise to inverse the logic element size). Ott et al. have related EMI to logic element size as well as clock frequency -- this is a factor that goes against higher DAC upsampling rates that I haven't addressed but has been demonstrated at >1 Ghz CPU clocks.

 

So yeah we could go with ECL/LVDS and other types of logic, spend more time on 3D SIV etc etc etc before the clock were to become a limiting factor --- yes this is what @Miska has been saying and I entirely agree but this is my spin on the situation...

[Arpiben]

25 minutes ago, jabbr said:

 

I have my own biases and part of my interest in looking at this from a quantitative perspective is to see if I can justify my impressions.

 

From a logical point of view, if the effect on the output is <120 dB or noise floor of the DAC then hard to see how it would be audible. Also phase noise is only one type of noise.

 

At the current state of affairs, clocks have outpaced the rest of the electronics, so really in a DAC you can be comfortable using something as easy to obtain as a Crystek 575 or similar and not worry about the clock itself.

 

Can still look at ways to decrease 1/f power supply noise (I started a thread about 1/f awhile ago -- again 1/f noise is what is behind the increased phase noise in the close-in range). Similarly avoid crosstalk and other sources of noise.

 

I think the biggest area that hasn't been addressed is noise in the DAC circuitry itself, specifically intrinsic logic switching noise and intrinsic logic phase noise -- this isn't simply phase noise (though Rubiola et al have related intrinsic logic phase noise to inverse the logic element size). Ott et al. have related EMI to logic element size as well as clock frequency -- this is a factor that goes against higher DAC upsampling rates that I haven't addressed but has been demonstrated at >1 Ghz CPU clocks.

 

So yeah we could go with ECL/LVDS and other types of logic, spend more time on 3D SIV etc etc etc before the clock were to become a limiting factor --- yes this is what @Miska has been saying and I entirely agree but this is my spin on the situation...

 

Thanks for having triggered and awaken my curiosity with your thread, sincerely.