Debate of DAC design regarding DSD vs PCM among 5 VIPs

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21 minutes ago, Ralf11 said:

Thanks for taking the time on this.

 

I have a question about the multi-bit R2R DACs - seems like they were not in fashion for a while, but then mounted a come-back.  Has there been a recent improvement in getting the resistors in the ladder more accurate?

 

Yes, the Heisenberg principle is felt to be outdated and no longer applies...

 

I like question 4.5. Answer is trivial once you realize that 1 bit SDM math is the same as analog math, just in the frequency domain ... get it?  

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On 4/14/2017 at 4:45 AM, rredline said:

 

 

Sorry I think this is BS

To achieve ASIC chip level performance, you need a much more complex and power hungry FPGA, certainly not that kind of entry level FPGA in Mojo capable of.

You'd be surprised what "entry level" FPGAs can do nowadays. I think the FPGA that's used in these DACs is about $20 and uses 1w or so... but there is considerable IP needed to optimize these chips whether ASIC or FPGA. Nowadays a "more complex and power hungry FPGA" might have a couple of onboard 4 Ghz ADC/DAC, be used to implement 100g Ethernet or build a digital oscilloscope/FFT analyzer, smart vision system for autos etc etc. 

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"Random" jitter probably means evenly distributed frequency offset or "white" whereas correlated jitter refers to "close in" or 1/f. Not sure this has anything to do with atomic clocks whose close in phase error isn't specified -- they don't really remove noise either because really long term frequency stability isn't very relevant 

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43 minutes ago, Miska said:

 

Correlated jitter is something that has distinct sidebands and is usually result of some systematic function leaking to the clock signal. J-test signal was designed to highlight this on I2S lines, where leakage from other lines to the critical clock line causes systematic frequency variation and thus distinct sidebands in DAC...

 

Yes, sidebands are generally "close in" to the clock signal. If you measure in 1hz an up increments you tend to see distinct bands, whereas if sub-Hz measurements then those bands may fill in, aside from true harmonics 

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27 minutes ago, Miska said:

 

Yes, but what I mean is that there's also random jitter that has "close in" distribution, causing just widening base of the main lobe. Like random phase noise with Gaussian distribution. But this is of course not correlated.

 

If you look at phase error distributions they rise up as offset decreases. Three slopes are described. Random or "white" error causes the baseline. 1/f noise is the upslope. This error is correlated both for clocks as well as transistors / resistors etc.

 

so assuming the baseline is -140 dB/Hz and the 1Hz is -90, the white component is insignificant compared to correlated.

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If you have a copy of Rubiola In referring to figure 2.10

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The three types of noise are generally thermal, shot and flicker which is (1/f). I'm looking at Rubiola: Phase Noise and Frequency Stability in Oscillators (2009), particularly Ch 2 which discusses noise in electrical devices and how that results in phase error in clocks. It's more than signal leakage, rather some physics.

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Right it's the flicker noise which is correlated. Flicker is what really causes peaks to widen.

 

Thermal noise affects the baseline not the peak.

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Agreed about importance of DAC latch.

 

"flicker" is a technical term described extensively by Rubiola who also describes the process of "parametric up conversion" where voltage/current noise results in phase noise. This is extensively discussed in the reference -- the very basis of why a good power supply for the oscillator is important. When a signal leaks that is, in fact, noise.

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43 minutes ago, Miska said:

 

In audio, correlated jitter typically means all the non-random processes.

 

Random sources such as thermal current/voltage noise causes uncorrelated jitter. There is no systematic relationship between audio signal and the disturbance. Since for example DPLL always has some low-pass frequency slope and corner frequency this causes the frequency lobe to have widening lobe, even if the input noise is white. This doesn't mean that the noise itself would be correlated in any way.

Flicker or 1/f noise is definitely correlated and since it's within the PLL corner, not easy to improve even with the "new" femtosecond chips which typically quote at 1khz or greater offset because that's where the number look the best.

 

This article is publicly available: http://www.fhnw.ch/technik/ime/publikationen/2008/circuits-at-the-nanoscale-communications-imaging-and-sensing

 

you might note the similarity between the "chopper" amplifier and "noise shaping" where upsampling pushes the noise into a higher frequency range -- above the PLL corner frequency in the former but I think the analogy is apropos

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On 4/28/2017 at 5:03 AM, Miska said:

 

There is no "good jitter". But random (uncorrelated) jitter is usually less audible than non-random (correlated) jitter. I picked up some examples...

 

This could be considered to be less bad "good" jitter:

 

And this could be considered to be more bad "bad" jitter:

 

You can see the first one has widening base of the main lobe, while the second one has narrower main lobe, but strong distinct side lobes.

 

OK, I see what you are writing. I think the problem would be the definition of the term "jitter" itself (I dislike this term).

 

The top would be what I would consider "phase error" ... the random part is the baseline (e.g thermal noise). The widening of the peak is related to 1/f or "flicker noise". This is correlated to signal in that it is both current/voltage dependent as well as "memory" dependent.

 

The bottom -- the sidebands are nearly the same amplitude as the center, so this is what I would call "distortion" and the levels are quite high. The signal surely would not be a clean sinusoid. Could be clipping, could be duty-cycle, could be significant cross talk. This would seem to be more of a "frequency error" rather than "phase error". Do you have a trace of the signal?

 

But again, I think the term "jitter" itself is problematic, and encompasses processes that are radically different.

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39 minutes ago, mmerrill99 said:

Again, if my analysis is correct, the top FFT plot would certainly not represent "good" jitter or even "less bad" jitter - it could be perceptually very significant, blurring sound somewhat I would guess.   

 

As you note, these are frequency rather than phase plots, and with linear, rather than log, scale along frequency(?). I'd say that phase error is better than outright distortion -- so clearly "less bad"  ...but ... hard to predict what the actual @1Hz offset error would be ... but let's say @10Hz is -60 db/Hz ... not the best achievable, so perhaps that's why this plot is selected, to demonstrate the error. As @Miska alludes to, the clock phase error is the best, but once it is distributed into the circuit itself, the numbers get worse. These numbers are never published and who knows how often they are actually measured.

 

The errors seen on the bottom plot might be due to more basic electronics issues such as crosstalk, setup timing errors, duty cycle asymmetries in computed clocks etc etc. You know a violin that is a bit blurred is better than a chainsaw  

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1 hour ago, mmerrill99 said:

What is meant by -60dB/Hz?

I'm suggesting that the amplitude of the error due to a clock drifting around it's fundamental frequency (phase noise) will be the same signal amplitude but reproduced at a frequency slightly different to the correct frequency.

 

So if the original signal is @-6dB then these errors in frequency will also be @-6dB. Why would they be reduced in amplitude? 

 

FFTs are not intuitive (i.e. misleading) when plotting at anything other than narrow band signals

 

Just another point - IMO, this is also correlated jitter as Jabbr has said - I believe it tracks the signal i.e only 'blurring' the frequencies in the signal, not producing noise which is unrelated to the signal! 

 

Typically phase error plots do not show frequency per se, rather frequency offset from the signal, and might be log, so 10^-3,10^-2,10^-1,1,10,10^2 on x-axis plotted against dB on y-axis.

 

so -60dB @1Hz means that the phase error component 1 Hz to either side of the carrier is diminished by 60dB

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The "correlation" of a phase error that rises as it gets closer to the carrier is correlated to the carrier -- this describes "slope". An uncorrelated error is flat regardless of distance from carrier i.e. slope is 0.

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1 hour ago, mmerrill99 said:

Ok, let's take it from first principles. We have two clock ticks one is at the exact correct frequency, 12MHz say & the next one is at 1Hz over 12MHz. Let's say this is the audio clock driving a DAC & the DAC is reproducing a pure tone of 11KHz. For simplicity let's not get into the shape of the sine wave & what part of this sine wave is being reproduced but rather that both digital samples should have produced a 11KHz signal at -3dB. The first sample does but the next sample (which is using the clock tick which has slipped by 1Hz) is producing the same amplitude signal but at the wrong time i.e it has shifted the frequency by 1Hz

 

My question is why would the amplitude be diminished? The frequency is wrong but I can't see how the amplitude is affected?

 

I know this skips lots of details & keeps it simplistic, in order to state my issue - maybe the answer is in the details that I'm not seeing?

 

Perhaps this can be considered like "conservation of energy" such that the SPL or energy is preserved, i.e. area under curve, so that when a peak is widened it loses peak amplitude -- holding energy constant ... otherwise a change in energy would be measured i.e. very accurate clocks would draw less power ... don't think that's the case.

 

Does that help? Remember that the FFT usually only shows the "real" or amplitude component, and being laplacian, there is the imaginary component. That's why its vector math, not simple addition/subtraction.

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If we are discussing the effect of phase error in a clock (12 Mhz example) on the reproduction of an 11 kHz tone, consider that the DSD DAC is integrating the pulse widths to product an analog signal and the pulse width variation is integrated ... a PCM DAC will similarly use a series of multibit values that will change with the clock. Using vector math, a change in the voltage representing a signal will have a component change to both the amplitude and phase of the underlying signal (at each frequency component).

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3 hours ago, mmerrill99 said:

... I can't see how this integration can explain a reduction in amplitude to the extent that we see in the FFT plot here - maybe I'm being stupid? 

No, I'm not sure that the goal has been to represent amplitude per se. An FTT does have an amplitude component, but we have been focusing on phase. Assuming amplitude is constant with time, the idea of "bins" being filled is a way to look at it (hesitating only because I haven't entirely thought this through...)

 

What do you mean by "reduction in amplitude"? I very well might be assuming the wrong thing.

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3 hours ago, mmerrill99 said:

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The x-axis in this case is the Hz offset from the signal spike.

 

So when the blue box is zoomed into, we see a difference which wasn't evident before

 

In this graph the x-axis is a much finer division - we are seeing 100Hz either side of the signal spike.

 

...

 

Yes.

Clearly need to look at a more narrow band distribution. I've used the term "linewidth" to describe this (from laser literature). I haven't considered the details of how these effects might affect SPL. I've been concerned with how to take fine grained close-in measurements in various parts of the DAC circuit.