Superclocks

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13 hours ago, rickca said:

Many people are intrigued by the recently introduced superclock in the SOtM Ultra series.  Now Auralic says they will have a superclock in their G2 product line along with the G2 Aries, Vega and processor.

 

So what's a superclock?  Chances are that SOtM and Auralic don't mean precisely the same thing.  This is going to get interesting.  It's the new buzzword.

 

Precision clocks come with a phase noise plot that specifies phase error vs offset frequency. Without this specification you are buying marketing jargon FWIW

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32 minutes ago, rickca said:

OK, thanks!  I trust you will bring some good perspective to this thread as we learn more about SOtM Ultra and Auralic G2.  Since the term superclock is starting to show up everywhere, we need to be better educated consumers if we care to understand what we're buying. 

Here's a spec sheet on a widely available part that goes for $14: http://www.crystek.com/crystal/spec-sheets/clock/CCHD-575.pdf

 

You'd want the close-in phase error (e.g. @1Hz) to be substantially better than this -- note that this is "femtosecond" range, so be very very careful before spending $$$ on marketing fluff.

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6 hours ago, Superdad said:

 

Of course if you want to see eye-popping phase-noise performance, then check out the Pulsar Clock. -118dB to -123dB at 10Hz!  But it is 420 Euros...

 

Then there is building your your own ala the @andrea_mori thread on DIY. Having a good crystal is particularly important as is a clean power supply. Crystals from Laptech in Canada. One point to remember is that the specs get worse as the oscillator frequency goes up (physics) so best to use the lowest frequency you need. This suggests that for DSD, perhaps DSD1024 won't be better than DSD512 but the exact point when things get worse is as yet unknown. For USB and Ethernet it is entirely unclear that doing any better than a Crystek will give any better performance. Measurements to demonstrate this are sorely lacking.

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http://m.pnas.org/content/114/12/E2303.full

 

when those quantum clocks get entangled with quantum cables ... oh boy!

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There are diminishing returns to reclocking upstream devices. As long as the jitter is within a defined range, and the setup delay properly set for the receiving latch, the latch will capture on the bit and not during a transition. At this point the receiving clock will determine the phase error.

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1 hour ago, vortecjr said:

The plots from MSB that I have seen are as measured on the analog output of the DAC with a specific power supply. I believe they isolate the signal twice for the measuremeant. Emphasis on a specific power supply. I see a bunch of mods replacing the clock...great. However, the power supply to the clock is usually ignored and I don't mean the power supply to the main board either I mean the power supply to the clock itself. Upgrading the clock on a device without considering the power on the border going directly to it is like putting lipstick on pig. 

 

Power supply and rest of circuit absolutely important. Because of the 1/f crossover (a nonlinearity), the flicker noise particularly affects the low end of the phase noise plot (i.e.  -67dBc/Hz @ 0.1Hz) and so 1/f noise in the power supply as well as resistors etc is particularly important. Larger crystals with low imperfections will tend to have less 1/f noise all else being equal.

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46 minutes ago, Elberoth said:

 

Good point. I have assumed by default that those numbers are in dBc/Hz, which as you said is the standard for phase noise measurements.

I made the same assumption and those numbers aren't out of range for a good low phase noise clock.