Multi Bit DACs vs. Delta Sigma DACs

[idiot_savant]

Hi,

 

I'm afraid the above example is about as wrong as it can get...

 

Let us imagine we have a DAC, and it has a range -2V to +2V, so 0V is right in the middle. In 16 bit terms ( MSB on the left, LSB to the right ):

-2V = 1000000000000000 ( -32768 )

0V = 0000000000000000 ( 0 )

+2V = 0111111111111111 ( +32767 )

 

So the crossover distortion is not this case.

 

The nonlinear distortion you get with a ladder DAC/multibit DAC is as follows:

Let's imagine we have a ramp, starting at 0V and going up, and we'll use a 4 bit DAC to make it easier:

0000 - no current sources

0001 - one current source, representing 1/16th of full scale ( 1/16 )

0010 - one current source, representing 1/8th of full scale ( 2/16 )

0011 - two current sources, representing 1/8th and 1/16th of full scale ( 3/16 )

0100 - one current source, representing 1/4th of full scale ( 4/16 )

0101 - two current sources, representing 1/4th and 1/16 of full scale ( 5/16 )

 

Now, as you can imagine, if our current sources ( resistors ) are not exactly[/b] multiples of two, our sums don't add up. In a 16 bit DAC, our LSB current source must be exactly 32768 times smaller than the MSB. For a 24 bit DAC, your LSB must be exactly 8388608 times smaller...

 

The problem is exacerbated by the zero crossing. In this case, the codes come against us, as in a 16 bit DAC, the least negative value (-1) is 1111111111111111, so the error is the accumulation of all the errors

 

I'll try and cover some more points later,

 

your friendly neighbourhood idiot

 

 

 

[idiot_savant]

The way the 1704 works internally ( as I understand it, anyway ) they largely remove the zero-crossing problem by having 2 DACs per channel. The first DAC handles all positive signals ( i.e. the MSB is clear )

The second DAC handles all negative values. It does this by inverting the state of all the bits and adding 1...

so, our least negative value ( -1 ) is all 1's. We invert these, to become all 0's and add 1 to get all zeroes apart from the LSB.

The main problem with the zero crossing now is making sure both DACs are matched, which they appear to do pretty well....

 

your friendly neighbourhood idiot

 

[idiot_savant]

Hi,

0000000000000001 = 1/32768

0000000000000000 = 0

1111111111111111 = -1/32768

1111111111111110 = -2/37268

definitely different.

 

There is always the issue of a slight DC offset ( where the min value is -32768, and the positive is +32767 ), but a better way to deal with this is make the extreme negative clamped by a sample

 

Peter is correct in that offset binary is a pain to use - extending wordwidths for instance is trivial in 2's complement, but in offset you need to set the midpoint to be different for different wordlengths

 

your friendly neighbourhood idiot

 

[idiot_savant]

Eloise is correct - sound is made of waves, which are represented by samples, centred around 0.

 

Now, as for this distortion, I've been thinking about this...

 

In one respect, a DAC that separates the decoding into a +ve and -ve DAC has to be careful about the crossover point - as I've said, the PCM1704 seems pretty good in this regard.

 

As for padding the LSBs, sign dependent padding is not a good idea - in this case you definitely add a step in the transfer function - imagine you had a DAC with 1 bit of extra resolution than the input: If we input a small ramp into it going down we get:

01000 : 8

00110 : 6

00100 : 4

00010 : 2

00000 : 0

11110 : -2

11100 : -4

11010 : -6

11000 : -8

 

If we pad according to the sign we get:

01000 : 8

00110 : 6

00100 : 4

00010 : 2

00000 : 0

11111 : -1

11101 : -3

11011 : -5

11001 : -7

 

or a guaranteed half-LSB DC offset for negative samples.... ( bad ) - this is relevant because the DAC will have (say) a 24 bit input, and the source may be only 16 bits, and how do we transport from the source to the DAC?

 

 

As for the sigma-delta thing, the point is that yes, the overall noise will be higher, but you can't remove the noise shaping and still call it sigma-delta.

And the quantisation noise in-band is not limited by the number of bits, providing you do everything properly ( i.e. have enough bandwidth to put the noise in ).

According to DSD, a 1-bit sigma delta has an overall SNR of 6dB, but better than 120dB in the area of interest ( DC-20k )

 

Sigma-delta processors do not have any intrinisc problem with noise, or transients, or many of the things proponents of mult-bit DACs like to think. They do have problems with idle tones, proper dither, and the removal of the out-of-band noise, and may be more susceptible to jitter.

 

There are good multi-bit and good sigma-delta designs. There are equally poor versions of each,

 

your friendly neighbourhood idiot

 

 

[idiot_savant]

As I have said before, everybody is entitled to have a preference. I was merely responding to:

The argument against goes along the lines of:

"all remaining DAC's with > 16 Bit resolution except the PCM1704 are delta-sigma (with multibit cores), so any such debate is completely futile anyway, as such DAC's have native resolutions (before noise-shaping and other digital tricks) of much less than 16 bits".

 

Notice how I said "intrinsic" problems with transients. We've been here before, and I have no great wish to go into it all again,

 

your friendly neighbourhood idiot