Singxer SDA-6

[Miska]

On 1/29/2021 at 9:57 AM, SwissBear said:

A precision: the test is made with an R2R DAC and not the SDA-6 as this is made clear in the Chinese post :-)

 

Now let's see same test with SDA-6 Pro version with the Crystek CCHD-957 clocks vs the Mutec (?) 10 MHz external clock you are using...

 

[Miska]

I think I can get SDA-6 Pro for myself at some point, the price isn't too bad and I'd like to do some testing with the latest AKM chip.

 

[Miska]

1 hour ago, w1000i said:

I saw Singxer SU-6 has CRYSTEK’s CCHD-957 and a Clock output. So can that be connected to SDA-6 and is that better than a standalone clock ?

 

SDA-6 Pro has the same clocks inside...

[Miska]

8 hours ago, SwissBear said:

I'm not sure. What I noticed with my experience with I2S is that the inability of some DACs to not use their PLL was making the use of an external clock less productive. But with AES/EBU, PLL seems to be necessary as we need to correct for the jitter introduced by the cable if I'm correct.

 

You need a PLL when you need to recover an external clock into usable local clock. IOW, when you are a clock slave. Like in case of S/PDIF or AES/EBU (or I2S for that matter although implementations vary).

 

When you have a local clock oscillator, you don't need a PLL. IOW, when you own the master clock. Like in case you are using USB or network interface like NAA.

 

[Miska]

1 hour ago, R1200CL said:

So in other words, the theory is that a converter like the SU-2 will benefit from a good clock ?

 

But why would you use something like SU-2 with SDA-6?

 

I never understood such setups. To me it is analogous to this:

- You buy a Ferrari, but you want another engine on it, so you buy a Lamborghini and connect to the two with a towing rope. And then tow the Ferrari around with the Lamborghini. And then the combination is somehow better than the Ferrari alone...

 

1 hour ago, R1200CL said:

Clocks matters and play a role in USB to SPDIF conversion ?

 

Yes, if you have a better clock at the source (USB to S/PDIF converter), then the PLL at receiver side has better chances or recovering a clean clock from the S/PDIF signal. But where do you need such converter these days where it would matter? Most of the time you can go with straight USB and skip the S/PDIF part. Of course someone may have an old DAC that doesn't have USB input or such.

 

[Miska]

5 minutes ago, hopkins said:

You'll still need a clock at some point... 

 

Good oscillator either inside the USB-to-S/PDIF converter (if you really need to use such).

 

Or preferably inside the DAC, sitting right next to the actual D/A conversion stage. This is the normal case these days when using USB.

 

[Miska]

2 minutes ago, hopkins said:

Yes. You avoid jitter in the transmission. But you can also get maximum noise injection from USB into the DAC. Which is why some people like Toslink, for example. There's no ideal situation... 

 

But none of this requires any external 10 MHz clocks (which by definition has wrong frequency anyway).

 

[Miska]

7 minutes ago, R1200CL said:

@Miska or anyone else. 

It's not totally clear to me what the clock, internally or externally is doing in a USB to an SPDIF converter. And what frequency is needed. I probably didn’t understand the answers given so far. 

 

Typically for 44.1k-base rate family you would need a 22.5792 MHz or 45.1584 MHz clock. And for 48k-base rate familiy 24.576 MHz or 49.152 MHz clock. You can find plenty of clock oscillators for these frequencies from manufacturers like Crystek or NDK. These are 512 or 1024 multiples of the base sample rate.

 

I2S data clocked using these clocks between the USB interface and the S/PDIF transmitter contains two clocks. Word aka left/right clock which toggles at the sampling rate. And bit clock which is 32x the sampling rate. For in case of 192 kHz data it is 6.144 MHz.

 

At 192 kHz sampling rate, the signal on S/PDIF is toggling at 24.576 MHz rate.

 

When you switch between the two sampling rate families, you need to switch between two separate master clocks.

 

25 minutes ago, R1200CL said:

I also think it’s widely accepted that the best solution is to have the DAC do any clocking. But I can’t understand how that could be part of a discussion when I’m only using AES/EBU.

 

Yes, that's the case. But when using S/PDIF or AES/EBU, typically you don't have a DAC side clocking other than a clock recovered using PLL from the S/PDIF or AES/EBU signal.

 

26 minutes ago, R1200CL said:

I was trying to read “GUIDELINES THE EBU/AES DIGITAL AUDIO INTERFACE” there they talk about clock recovery. But I don’t understand if that matters or not as the DAC has its own clock.

 

There are some special solutions where DAC has it's own clock when using S/PDIF or AES/EBU input, but this is a relatively rare case and it needs complex implementation because you have two separate clocks that are running independently at their own frequencies. So most of the time this is not the case.

 

[Miska]

3 hours ago, R1200CL said:

To reframe the question, does the quality if the 44.1k-base rate family 22.5792 MHz or 45.1584 MHz clock and the 48k-base rate familiy 24.576 MHz or 49.152 MHz clock matter ?

 

Yes, that's why I use for example Crystek CCHD-957 oscillators in my DAC prototypes. These are available at those frequencies. The effect is more definite when it is directly clocking the conversion stage inside a DAC. Also SDA-6 Pro model comes with those same oscillators.

 

3 hours ago, R1200CL said:

So one could assume better input to this PLL, may affect further what’s happening in a DAC ?

 

Yes, it makes life easier for the PLL. It doesn't translate directly into actual conversion clock performance, but it helps.

 

[Miska]

1 hour ago, R1200CL said:

How a single 10 MHz can replace the function of those two internal clocks ?
Maybe there still is a chance I haven’t understood how this 10 MHz external input actual is working and it’s real mission. 

 

Through a programmable fractional PLL. A bit like a sample rate converter that can convert between rate families. This is also similar to audio clock generation on HDMI interface where audio clocks are generated from the video pixel clock.

 

1 hour ago, R1200CL said:

When do we use a Word clock ? (WCL)

 

It is mostly used by studios when you need to synchronize multiple DACs or ADCs running in parallel. Since it usually runs at 44.1 kHz, it is also prone to a lot of jitter.

 

1 hour ago, R1200CL said:

Will circuits that produce multiple frequencies degrade output from the clock.

 

You mean the ones that create multiple frequencies from single reference? Yes, usually they do.

 

[Miska]

6 hours ago, R1200CL said:

Then maybe a very good 10 MHz clock can replace the dual internal ones.

 

Sure it can replace, but I personally don't see a point in added complexity where result is likely quite a bit worse.

 

6 hours ago, R1200CL said:

Just why wouldn’t designers then use programmable fractional PLL and a 10 MHz clock in general instead of dual clocks of different frequencies ?

 

Because it is more complex, more expensive and produces inferior results.

 

It is best to have a good oscillator (like the Crystek) at the frequency you need, at the place you need. That's why you'd usually find two of such Crystek's inside a DAC, next to conversion section. The unused ones are disabled through the corresponding enable/disable pin.

 

[Miska]

1 hour ago, Tavy said:

The only negative point I see so far is the volume difference PCM vs DSD which will request to adjust the volume between the two formats - this is very poor design decision to my view. It made the D90 MQA sound very dull.

 

DSD should be 3 - 6 dB quieter than PCM. By design. Otherwise you have risk of overloading some analog stage somewhere. 0 dB DSD equals to -6 dB PCM. However, DSD spec allows temporary peaks to reach +3.15 dB.

 

OTOH, PCM albums vary in loudness too, so you may need to adjust volume also between PCM albums.

 

Not an issue for me though either, since I always run DACs are their optimal format. So never switching between PCM and DSD for example. These kind of DACs I just run at DSD256 always.

 

[Miska]

17 hours ago, Tavy said:

Regarding different output volume for DSD vs PCM, this should have been resolved by design avoiding making volume adjustment during audition.

 

Ultimately it depends on mastering of the record you are listening and not on DAC design.

 

But AKM chips have DSD output level at -3.5 dB ref DSD +6 dB vs PCM 0 dBFS. If you want them to be "at same level", set the DSD side to DSD Direct mode and PCM side digital volume to -3.5 dB.

 

18 hours ago, Tavy said:

I don't plan to use any kind of up-sampling using different filters - I prefer the NOS mode and the sound of this DAC was what I was looking for.

 

With the SDM DAC chips, you still have the "copy the same sample N time" oversampling.

 

Using "NOS mode" at input rates below 352.8k gives technically pretty horrible results.

 

[Miska]

1 hour ago, DomiJi said:

In DSD Mode the SDA 6 is always in NOS

 

Does that mean it is always DSD Direct? Since in any case DSD is always NOS with any chip I'm aware of...

 

[Miska]

3 hours ago, copy_of_a said:

Miska - did you actually acquired one eventually and tested it?

 

No, I got distracted for something else...