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UpTone Audio EtherREGEN (Objective Discussion Only)


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5 hours ago, sandyk said:

 

 You could have at least given the members and readers, a chance to see John Swenson's side of the story.

https://cdn.shopify.com/s/files/1/0660/6121/files/UpTone-J.Swenson_EtherREGEN_white_paper.pdf?v=1583429386

 

I read that - what's missing for me is the mechanism by which the groundplane noise gets to affect the clock. If the designers put the clock itself on the same groundplane as the rest of the logic I can see how it would matter but designers who're aware of this issue would likely use a separate groundplane (island) for such sensitive circuits as an oscillator. Or is it that DAC designers are blissfully unaware of ground bounce issues?

 

If its that DAC designers are screwing up layouts it would be great to see examples of PCB layout errors in various vendors' offerings.

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Its not a request as such, just it would be good to see an example of how clocks get corrupted in DACs where the designers have made layout errors. It would help the industry to improve their designs.

 

I am not expecting them to do this, its just a wish.

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24 minutes ago, Archimago said:

What we need to see are John Swenson's measurements from DACs - if he ever shows them. I would not hold my breath.

 

 

You're aware that measurements made in normal mode probably won't show anything on the DAC's output are you? Isolation brings reductions in common-mode noise and there's no guarantee that'll get converted to normal mode at the DAC's output.

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So what is it that makes this mechanism - even if shown to be active in practice - relevant in the bigger picture?

 

On your measurement result - fine, I don't have a different one because I have yet to see the relevance. Which is why I'm asking about that.

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4 minutes ago, jabbr said:


The entire argument that server noise makes it across the Network depends either on this or common mode noise transmission. 

 

I'm not personally in any doubt about the common-mode noise issues, clearly they're very relevant. However the jitter arguments in the white paper seem to leave out a vital step - how does the groundplane noise make it into the DAC clock? Common ground impedance coupling is certainly a method that it can - so then if designers are indeed making that mistake, show some examples of it in real-world products. I note that Schiit is most likely (I dunno for sure, just from looking at their latest USB board) using transformers to couple the clock to the DAC - if this turns out to be true then at least they are on top of this problem.

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1 minute ago, plissken said:

 

For myself I'm not asking about all the permutations.... I'm asking on what system UT made this happen.

 

What is 'UT'? I'm with you on the points about jitter, despite having read the white paper I still cannot see how jitter is an issue unless DAC designers aren't implementing best practice in terms of PCB layout. Which is why I'd like examples of DACs in the marketplace where this has been screwed up.

 

On the CM noise/isolation front, I would agree that fibre renders it a non-issue. Is anyone making a DAC which has fibre as its input?

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3 minutes ago, plissken said:

 

I would prefer to validate that. Claims without evidence are just as easily dismissed without evidence.

 

How would you validate it? Jud saying he's a happy punter should just be dismissed as 'no evidence' ? If not, then what?

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3 minutes ago, plissken said:

Lumin makes one.  But don't miss the forest for the trees here: Copper RJE connectivity is so problematic, why does Auralic, Lumin, NAIM, Cary Audio, Cambridge etc, etc... all have that type of connectivity?

 

Given the expensive measures I've seen many go through optical based Ethernet is kids play.

 

Are you curious as to the reasons those companies make DACs with copper connectivity or are you arguing to make a point like 'Those guys make DACs with those interfaces so cannot be so problematic' ? If the former, have you asked them? If the latter, consider how many manufacturers make products with single-ended analog inputs and outputs using RCAs.

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3 minutes ago, plissken said:

 

SBT testing would be one way. Capturing some output would be another.

 

SBT testing of whether customers are happy? Are you serious here or just changing the focus to something not relevant to the discussion? Recall originally this was about my claim that there's evidence of happy customers. Your reply was 'I'd like to validate that' - by which you didn't mean that you didn't want just to rely on UT's claims they were happy but wanted to check for yourself?

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