EtherREGEN: The long development thread. [Some Gen2 dev. pics and update starting on page 92.]

[Superdad]

1 minute ago, JohnSwenson said:

The quote from my wife was:

"since it always works out in the end, if it's not working, it's not the end!"

 

So there really are two brilliant Swensons under one roof! 

[rickca]

2 hours ago, Superdad said:

Of course now you gents have me thinking about all the text and diagrams I need to create for the User Guide.  I have yet to write a word of it!

I started my IT career doing tech support for mainframe software like MVS, CICS and VTAM that each came with a massive library of thick manuals.  These days people won't even read a fold-out card.

 

You write very clearly, Alex.  I'm sure once you get started it will come together nicely.

[PYP]

32 minutes ago, rickca said:

You write very clearly, Alex.  I'm sure once you get started it will come together nicely.

Agreed.  And thank you for the real-time updates.  

 

I'm assuming there are a few folks like me, who have a simple setup and think they already know how to connect the eR 😎 , so a simple block diagram of the simplest one-input-one-output (as one of the illustrations) might be helpful.   At any rate, I'm sure there also a few of us who think the most important update to your website will be the "add to cart" for your new invention.  

[FileMakerDev]

Very excited about this. Thanks for all the detailed information Alex!

[thotdoc]

5 hours ago, Superdad said:

Plenty of work still to be done. But if all goes well with these pre-production boards then real world testing can begin so that we can enter full production in just a few weeks.  Crossing our fingers...

 

John was going to be using the past several weeks wait time (while these boards were being built) to write the code for boot programming of the clock synthesizer and the Ethernet switch chip (you can see the two 6-pad TAG-connect spots on each side of the moat--where every board will be flashed in production). To facilitate this, about 6 weeks ago he built a circuit board with just the synthesizer, the tiny microprocessor he chose, and appropriate power supply parts.

 

Unfortunately he had to spend most of that time sorting out several arcane issues regarding getting the code to run after loading. So a lot of time was lost by the programmer (John) getting the programmer (the other boxes and boards we bought) to program the processors which in turn program the chips on start up.  It was very frustrating for him and required many nights of deep-dive into the data sheets of the processor as well as web forum searching. But in the end--just in the last three days--he discovered and overcame all three of the obstacles, so that now code loads and runs correctly. Hurrah!

 

Just last night he was able to begin writing and testing code for the clock synthesizer and switch chip. There really won't need to be a lot to it (he completed the Ethernet switch register settings research long ago), though the synth will load separate code sets depending upon if the little black switch next to the BNC jack is set to Internal or External.

 

 

 

Thanks.  We are happy and optimistic. But truly all the credit goes to @JohnSwenson.  He supplies the brainpower, I supply the nervous sweaty palms and words of encouragement.  I NEVER loose faith in John, even when he has hit a wall. I forget how his wife phrased it last week when he felt he was stuck: Something to the effect of "Guess you are just not done yet." 

 

 

An external reference clock is NOT required to get stellar performance from the EtherREGEN! 

It already has built-in the lowest-phase-noise production oscillator on the market (at least one where the OEM cost is not hundreds of dollars!)--positioned within millimeters of the chips that use it.  Plus virtually all the clock lines on the board are run as differential pairs--including across the moat--and the ultra-low jitter differential flip-flops we use are unparalleled in the world.  So real-world jitter is going to be far lower than any other switch with just a fancy clock board wired in. 

 

So why is there a BNC jack and support for an external 10MHz reference clock? Because it was easy to include (for probably a total of less than $10 more) as a competitive "checklist" item.  It is no secret that we are going to compete with the nearly 3x the price and 4x the size SOtM sNH-10G.  I'll skip all the in-our-favor technical advances comparison for now.  But since the SOtM sNH-10G has (if you pay the extra $200 and get the $1,700 version) a BNC for external clock; and since some of the enthusiasts here happen to have a fine expensive reference clock such as the Mutec REF10--it seemed like a good idea to include provision for that on the EtherREGEN.

 

Will use of an external clock with the EtherREGEN make any worthwhile sonic difference?  I have no earthly idea!  I guess some of you will find out.

 

No and no.

 

You are correct about that.  But based both on the questions that have come up in this thread and on what will be typical usage for the average person, I decided to include the word "OUTPUT" above the 'B' side port. Consider it a preemptive attempt to reduce e-mails from people who don't read the User Guide. 

 

Thanks Paolo. Also considered. But I am trying to keep things simple and we really want people to read the User Guide. I am hoping that Calling them 'A' PORTS and 'B' PORT will encourage people to read the User Guide to see and understand about the two sides of the moat and how best to attached their components to the EtherREGEN. 

 

[Of course now you gents have me thinking about all the text and diagrams I need to create for the User Guide.  I have yet to write a word of it! ]

Thank you for the answers

[cool_chris]

So there is no 1 gb across the moat.

For those who own or consider Taiko extreme would it be possible 

or adviced to change the flow direction ?

Taiko extreme has SFP optical module for ethernet so it sounds like 

it could make sense to feed the internet signal from a single B side and exit the signal 

Via SFP optical to feed server.

 

the only downside of this is that the clock on B side is very close to the Ethernet port.

I wish this clock is close to the SFP module .

 

in other worlds , this is designed with 100 ethernet B side to feed your server, 

the other way Is possible but probably not as optimal as above .

[jcn3]

5 hours ago, cool_chris said:

So there is no 1 gb across the moat.

For those who own or consider Taiko extreme would it be possible 

or adviced to change the flow direction ?

Taiko extreme has SFP optical module for ethernet so it sounds like 

it could make sense to feed the internet signal from a single B side and exit the signal 

Via SFP optical to feed server.

 

the only downside of this is that the clock on B side is very close to the Ethernet port.

I wish this clock is close to the SFP module .

 

in other worlds , this is designed with 100 ethernet B side to feed your server, 

the other way Is possible but probably not as optimal as above .

 

The intent is for the endpoint to be on the B side,  so that it gets as clean and isolated data as possible. 

[Superdad]

12 hours ago, cool_chris said:

So there is no 1 gb across the moat.

For those who own or consider Taiko extreme would it be possible 

or adviced to change the flow direction ?

Taiko extreme has SFP optical module for ethernet so it sounds like 

it could make sense to feed the internet signal from a single B side and exit the signal 

Via SFP optical to feed server.

 

The EtherREGEN will be as effective in either direction.  So what you propose will work great.  It is why we went to the extra trouble and expense of making all the clocking, data, and power networks symmetrical on both sides of the moat.

 

Quote

the only downside of this is that the clock on B side is very close to the Ethernet port.

I wish this clock is close to the SFP module .

 

The sophisticated clocking system of the EtherREGEN involves far more than just the XO. Later I’ll try to post a block diagram of just the clock system. But the physical positioning of the oscillator on the board and its proximity to any one port is completely irrelevant.  

 

None of the Ethernet chips nor the high-speed ultra-low-jitter flip-flops are fed directly off the XO. Rather they are fed from the jitter-attenuating clock synthesizer, whose four separate outputs are all differential lines—so trace lengths on the board don’t matter.  And the LVDS>single-ended clock buffers are placed extremely close to the Ethernet chips (those have single-ended clock inputs).

[cool_chris]

11 minutes ago, Superdad said:

None of the Ethernet chips nor the high-speed ultra-low-jitter flip-flops are fed directly off the XO. Rather they are fed from the jitter-attenuating clock synthesizer, whose four separate outputs are all differential lines—so trace lengths on the board don’t matter.  And the LVDS>single-ended clock buffers are placed extremely close to the Ethernet chips (those have single-ended clock inputs)

 

This is fantastic news !

thank you .

please excuse us , we are still in the clock era and not in the clock synthesizer times .

And we will not be in the separate outputs differential lines for clock any time soon.

The big exception to this will be ether regen to bring us few ages to the future.

[Superdad]

6 hours ago, jcn3 said:

The intent is for the endpoint to be on the B side,  so that it gets as clean and isolated data as possible. 

 

No, both sides are equally “clean.”  As long as you cross the moat—and ideally have the endpoint alone by itself on one side (or the other)—then the EtherREGEN’s isolation and clocking benefits will be fully realized.

 

We are limited to running 100Mbps through the active, low-jitter, differential isolators whch sit on the moat. Since most user Ethernet audio endpoints have little need for data above that rate (even DSD512 is less than half that)—and they may run electrically quieter internally at 100Mbps as Gigabit mode is more current-hungry—it makes the most sense for us to suggest that people use that lone ‘B’ side port as the downstream “output” side.

But as explained (here and in my post just above), there is nothing inherently better about going in one direction or the other. Ethernet is bi-directional signaling anyway! 

[Ricardo007]

3 hours ago, Superdad said:

 

The sophisticated clocking system of the EtherREGEN involves far more than just the XO

XO?

[Superdad]

2 minutes ago, Ricardo007 said:

XO?

 

XO = Clock Oscillator.

[pl_svn]

On 7/19/2019 at 8:45 PM, Superdad said:

we really want people to read the User Guide

 

a writer once said: "I reached the age one should better cultivate velleities than illusions"

 

[gstew]

On 7/17/2019 at 1:57 AM, JohnSwenson said:

During the development of the opticalRendu this WAS a serious problem, note the WAS, it has been fixed a LONG time ago so it is no longer an issue, you can now use a 2inch cable if you want to.

 

End of story, it is NOT an issue with any of the products Sonore ships.

 

John S.

@Superdad...

 

Might this comment from John in one of the Sonore threads possibly mean we'll see an EtherPCB to go with our EtherRegens?

 

Inquiring minds wanna know.

 

Greg in Mississippi

[Bernstein]

@Superdad

 

Is there an estimated price range for the EtherRegen? 

Just a best guess would suffice 😄 

 

Greetings from Munich 

Selim 

[Superdad]

6 minutes ago, Bernstein said:

 

Is there an estimated price range for the EtherRegen? 

 

US$625

 

6 minutes ago, Bernstein said:

Just a best guess would suffice .

 

That should be the firm price (unless the quote for the cases comes in wildly higher than expected which it should not—same enclosure as with UltraCap, just extra for milling openings of both front/rear end panels).

 

[Superdad]

28 minutes ago, gstew said:

Might this comment from John in one of the Sonore threads possibly mean we'll see an EtherPCB to go with our EtherRegens?

 

At first I was scratching my head about what you meant—until I realized you were riffing off the name of our circuit board based USB adapter, the USPCB Adapter.

Sorry no. Zero plan for a PCB Ethernet cable from us.

[gstew]

BUMMER on the EtherPCB!

 

Consider it a request!

 

HURRAH on the EtherRegen price.

 

$$$'s are itching a hole in my bank account waiting to buy one!

 

Greg in Mississippi

[justubes]

21 hours ago, Superdad said:

 

XO = Clock Oscillator.

What frequency is it running?

[Bernstein]

@Superdad Good: consider it my Christmas present, even not celebrating it 😆 

Just wondering looking at the design and the idea behind it: Does John Swenson work for a server / semiconductor company? Reminds of my time designing signal paths/clocks etc...

[R1200CL]

@JohnSwenson

Why would you probably not recommend a protective cap and the BNC plug ?

 

Is these items just marketing BS ?

 

@Superdad

I don’t mind paying an extra $5, if you or John advice use of such blind plugs. 
 

I know you can even add RJ45 protective caps, but I suppose you don’t endorse those either ?

 

[R1200CL]

My understanding is there isn’t any difference in using optical vs RJ45 A-side and then cross over to B-side. 

[Superdad]

1 hour ago, R1200CL said:

 

Why would you probably not recommend a protective cap and the BNC plug ?

Is these items just marketing BS ?

Pretty much. 

 

1 hour ago, R1200CL said:

I know you can even add RJ45 protective caps, but I suppose you don’t endorse those either ?

 

No we stick just to engineering things that make a difference. People are free to tweak with silly stuff if they wish. 

[Superdad]

2 hours ago, justubes said:

What frequency is it running?

Sorry, how would that be useful information to you?

But since you asked and since telling does not give away anything secret:

We use a Crystek CCHD-575 at 25MHz as the reference to drive a particular Silicon Labs jitter-attenuating differential clock synthesizer (which we also have set to alternatively accept a 10MHz external reference clock).

We use all 4 available outputs of the synth, programmed to generate two separate 25MHz lines (for the Ethernet chips on both sides of the moat), and two 250MHz lines—for the high-speed, ultra-low-jitter differential reclocking flip-flops on both sides.  

[nonesup]

Hi Alex.

 Some answer for my previous post.

 

Are you thinking about a new USB Regen based on what you have learned with the development of EtherRegen?

😁