SMPS and grounding

[jabbr]

@JohnSwenson nice investigation  

 

Help a simple country boy out please: the term “high impedance leakage current” is making me a little dizzy as I try to drink my coffee on this Sunday AM. Impedance isn’t a term normally used to qualify a current so perhaps we should rename this before it takes on a life of its own — you mean “high voltage/impedance” = current ... what is a better term? 

 

Also these currents are going to be way more important at higher frequencies. I think if a circuit were made available to precisely illustrate the excellent point you are making here (this is all about parasitic capacitances and inductances) this frequency point will be better illustrated. (Yes— high impedance probes are essential when working with RF)

[jabbr]

or is it this: the solid state “relays”/MOSFET switches in the power supply have very high impedance when “off” and connected to the input SMPS so transmit this leakage?

 

yeah I think these are parasitic capacitances on the package, mosfets etc and really do pass much more current at higher frequencies — and grounding the SMPS does provide a low impedance path to ground.

[jabbr]

12 minutes ago, Superdad said:

 

MOSFETs where?  There are none in the LPS-1.

Haha are you sure? Of course there are

 

What “relays” are you using? Solid state or mechanical?

 

Hint: regardless, the parasitic capacitance in the “open” position determines your “high impedance” circuit  

[jabbr]

41 minutes ago, Superdad said:

 

Quite sure!    No mechanical relays and no MOSFETs!  MOSFETs have much too much capacitance.

 

 

Some do ... but trust me there are some MOSFETs ... including likely inside the solid state relays... even without there are parasitics 

[jabbr]

Haha ok (there are mosfets in the cpld/FPGA)... my own power supplies are not intended stand alone, rather for project s I am working on. The published circuits are examples that folks may modify to their own needs. I’m fine with any of bipolars, jfets and mosfets ... the particular MOSFET shown has particularly good specs  for the application. 

 

The point I am trying to make ... which applies to all solid state devices ... is that the impedance has both a parasitic and inductive component and hence leakage current will tend to be higher at the node which will be at a higher frequency.

 

Ths point has come up with isolation transformers — why would 0.0005 pF interwinding capacitance be better than 0.005 — where at 60 Hz allows negligible current yet at higher frequencies, one can measure a difference...

[jabbr]

2 hours ago, JohnSwenson said:

In the case of SMPS leakage there seems to be both a high impedance component and a low impedance component. At low frequencies the impedance was very high, about 300 mega ohms. I determined this by trying different resistors in series and to shunt to ground.  But it wasn't behaving correctly. I put a resistor in parallel that should have dropped the level by 80dB, but it didn't it only dropped by 30dB. Then I tried putting a medium range resistor in series, and it dropped down to below the instrument floor. The only way this can happen is if the source has at least two sources, one very high impedance and one much lower.

 

The source impedance DOES vary with frequency, but no where near close to what it would be if it was just a capacitor from AC line to output. It seems to be way more complex than that.

 

Can you draw out a circuit? I am assuming there is a shared ground, and if there is a shared source i.e. there is a single circuit, then there is no physical way to separate currents into a low and high impedance component *except* by frequency. 

 

Typically capacitance will predominate at lower frequencies and then inductances at higher frequencies (package, leads etc), so that there will be a dip at some point of minimum impedance -- below this frequency, capacitance predominates, above inductance.

 

Perhaps I am missing something? Would it be possible to draw out a proposed schematic that would illustrate these two distinct, components (each having their own impedance/frequency profile)?

[jabbr]

14 hours ago, Superdad said:

The SMPS before and after ground shunting graphs shows the elimination of the high impedance stuff, and then the graph going through the LPS-1 shows the elimination of the remaining low impedance stuff. (Not presented was the graph showing  the un-shunted SMPS powering the LPS-1: Much of the high impedance leakage can be seen getting through--until the simple input ground shunting is put in place.)

 

The best I can formulate this is that leakage currents arise from circuits which include the ground. Many of these circuits are formed by parasitic capacitances (ie are not intended by the schematics). 

 

There may be multiple such leakage circuits. Each with a characteristic impedance, current and frequency profile. Current will tend to flow across the path of least impedance and this providing an alternate low impedance path to ground  will tend to shunt current that would otherwise flow in a higher impedance leakage circuit.  

 

Note that the shunts must be through low impedance (not just low resistance) connections to ground. When mitigating otherwise low impedance leakage circuits need to focus on low inductance shunts to ground as inductance becomes more important as frequency rises.