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DAC chip latency


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In all the discussions about latency, rarely is that of the DAC chip itself mentioned. To find out just how much it might be, I played single-sample pulses while measuring the delay between the first one bit on the I2S data input and the corresponding pulse in the analogue output on the DSD1793 chip in the iFi Nano.

 

tek00000.png

At 48 kHz sample rate there is a delay of 650 microseconds. This corresponds to roughly 31.2 sample intervals.

 

tek00001.png

At 96 kHz the delay is 326 microseconds or 31.3 sample intervals.

 

tek00002.png

The pattern holds at 192 kHz with 165 microseconds delay, equating to 31.6 samples.

 

tek00003.png

With 384 kHz input, the iFi Nano puts the DSD1793 in filter bypass mode whereby the internal upsampling filter is disabled and the input goes directly to the sigma-delta stage. As a result, the latency on the analogue output drops to 5.56 microseconds.

 

Then there is DSD. This is tested by sending a short sequence of ones surrounded be zeros. It is not a proper DSD signal, but it serves the purpose.

 

tek00004.png

The delay at DSD64 is 7.62 microseconds.

 

tek00005.png

DSD128 reduces the delay to 5.81 microseconds. As an aside, it is worth noting that the rise time of the analogue output is unchanged.

 

tek00006.png

At DSD256 the delay drops further to 4.86 microseconds. The rise time remains unchanged.

 

Is this at all relevant? Hardly. If nothing else, the USB interface adds a latency of several milliseconds.

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In all the discussions about latency, rarely is that of the DAC chip itself mentioned. To find out just how much it might be, I played single-sample pulses while measuring the delay between the first one bit on the I2S data input and the corresponding pulse in the analogue output on the DSD1793 chip in the iFi Nano.

 

[ATTACH=CONFIG]27944[/ATTACH]

At 48 kHz sample rate there is a delay of 650 microseconds. This corresponds to roughly 31.2 sample intervals.

 

[ATTACH=CONFIG]27945[/ATTACH]

At 96 kHz the delay is 326 microseconds or 31.3 sample intervals.

 

[ATTACH=CONFIG]27946[/ATTACH]

The pattern holds at 192 kHz with 165 microseconds delay, equating to 31.6 samples.

 

[ATTACH=CONFIG]27947[/ATTACH]

With 384 kHz input, the iFi Nano puts the DSD1793 in filter bypass mode whereby the internal upsampling filter is disabled and the input goes directly to the sigma-delta stage. As a result, the latency on the analogue output drops to 5.56 microseconds.

 

Then there is DSD. This is tested by sending a short sequence of ones surrounded be zeros. It is not a proper DSD signal, but it serves the purpose.

 

[ATTACH=CONFIG]27948[/ATTACH]

The delay at DSD64 is 7.62 microseconds.

 

[ATTACH=CONFIG]27949[/ATTACH]

DSD128 reduces the delay to 5.81 microseconds. As an aside, it is worth noting that the rise time of the analogue output is unchanged.

 

[ATTACH=CONFIG]27950[/ATTACH]

At DSD256 the delay drops further to 4.86 microseconds. The rise time remains unchanged.

 

Is this at all relevant? Hardly. If nothing else, the USB interface adds a latency of several milliseconds.

 

I can get you a bullet proof vest :)

 


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My asbestos underwear won't be enough?

 

The linear delay with PCM and nonlinear delay for DSD is not intuitive. The DSD output response indicates slewing. Higher input sampling rate should output higher rate.

Thanks for checking and posting.

 

2012 Mac Mini, i5 - 2.5 GHz, 16 GB RAM. SSD,  PM/PV software, Focusrite Clarett 4Pre 4 channel interface. Daysequerra M4.0X Broadcast monitor., My_Ref Evolution rev a , Klipsch La Scala II, Blue Sky Sub 12

Clarett used as ADC for vinyl rips.

Corning Optical Thunderbolt cable used to connect computer to 4Pre. Dac fed by iFi iPower and Noise Trapper isolation transformer. 

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Same measurements on a Cirrus Logic CS4270 chip as found in a Steinberg UR242. This is a much less sophisticated chip than the DSD1793, and it shows.

 

tek00007.png

48 kHz sample rate gives a delay of 205.4 microseconds or 9.86 samples. Also, the impulse response looks horrible. That'll need a separate investigation.

 

tek00008.png

At 96 kHz there is unexpectedly a minimum phase response with a delay of 42.43 microseconds or 4.07 samples.

 

tek00009.png

Finally, a 192 kHz sample rate results in a delay of 18.81 microseconds, 3.61 samples. Still minimum phase. Still very odd-looking.

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If I have a gizmo do you think latency will change ?

 

Please answer quickly, as I don't have a microsecond to spare!

One never knows, do one? - Fats Waller

The fairest thing we can experience is the mysterious. It is the fundamental emotion which stands at the cradle of true art and true science. - Einstein

Computer, Audirvana -> optical Ethernet to Fitlet3 -> Fibbr Alpha Optical USB -> iFi NEO iDSD DAC -> Apollon Audio 1ET400A Mini (Purifi based) -> Vandersteen 3A Signature.

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Latency doesn't really matter. I agree. But there's some situations where it does matter. It matters to pro audio guys when they are tracking in the studio. If there's enough latency in the DAC, it can affect the lip sync watching video. Knowing how latency can change with sample rate or on its own can be important to know if one is trying to use a DAC with a crossover to a different DAC. I've made this mistake before. Although it's possible to crossover one DAC to another, it can get pretty complicated depending on the DAC. I've owned two different DACs which I later found out exhibited variable latency at the same sample rate. IOW, the latency changed after every lock. This makes it impossible to use digital crossovers, unless one likes a different crossover every time he listens. :-)

THINK OUTSIDE THE BOX

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Latency doesn't really matter. I agree. But there's some situations where it does matter. It matters to pro audio guys when they are tracking in the studio. If there's enough latency in the DAC, it can affect the lip sync watching video. Knowing how latency can change with sample rate or on its own can be important to know if one is trying to use a DAC with a crossover to a different DAC. I've made this mistake before. Although it's possible to crossover one DAC to another, it can get pretty complicated depending on the DAC. I've owned two different DACs which I later found out exhibited variable latency at the same sample rate. IOW, the latency changed after every lock. This makes it impossible to use digital crossovers, unless one likes a different crossover every time he listens. :-)

 

It's like settling time in ADC's? or latency in ADC's?

 


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It's like settling time in ADC's? or latency in ADC's?

 

The DACs I've used which exhibited variable latency at same sample rate used over-the-top jitter attenuation stage. They behaved differently tho. The Totaldac's fifo buffer would take a while to lock and in the interim had constantly rotating latency. MSB DACs do something similar but at least MSB had the forethought to allow the user to disable the FIFO jitter attenuator.

 

The Mola Mola DAC also has variable latency. Brun0 knows about it but doesn't plan to address the issue. He doesn't think it's a problem. For more folks it's not a problem.

THINK OUTSIDE THE BOX

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The DACs I've used which exhibited variable latency at same sample rate used over-the-top jitter attenuation stage. They behaved differently tho. The Totaldac's fifo buffer would take a while to lock and in the interim had constantly rotating latency. MSB DACs do something similar but at least MSB had the forethought to allow the user to disable the FIFO jitter attenuator.

 

The Mola Mola DAC also has variable latency. Brun0 knows about it but doesn't plan to address the issue. He doesn't think it's a problem. For more folks it's not a problem.

 

Thank you for the explanation, I was just thinking there is a long way to reach the DAC and many conversions.

 


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The DACs I've used which exhibited variable latency at same sample rate used over-the-top jitter attenuation stage. They behaved differently tho. The Totaldac's fifo buffer would take a while to lock and in the interim had constantly rotating latency. MSB DACs do something similar but at least MSB had the forethought to allow the user to disable the FIFO jitter attenuator.

 

The Mola Mola DAC also has variable latency. Brun0 knows about it but doesn't plan to address the issue. He doesn't think it's a problem. For more folks it's not a problem.

 

I think you're more likely to encounter that kind of variation in USB and S/PDIF front-ends than in the DAC chip itself, which is what I was looking at here.

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I think you're more likely to encounter that kind of variation in USB and S/PDIF front-ends than in the DAC chip itself, which is what I was looking at here.

 

You mean that the DAC chip is not influenced by the variation in USB front-ends?

 


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Latency doesn't really matter. I agree. But there's some situations where it does matter. It matters to pro audio guys when they are tracking in the studio. If there's enough latency in the DAC, it can affect the lip sync watching video. Knowing how latency can change with sample rate or on its own can be important to know if one is trying to use a DAC with a crossover to a different DAC. I've made this mistake before. Although it's possible to crossover one DAC to another, it can get pretty complicated depending on the DAC. I've owned two different DACs which I later found out exhibited variable latency at the same sample rate. IOW, the latency changed after every lock. This makes it impossible to use digital crossovers, unless one likes a different crossover every time he listens. :-)

 

This is why house sync becomes important and many pro-audio pieces have that as an option. That and component selection.

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You mean that the DAC chip is not influenced by the variation in USB front-ends?

 

DAC chip manufacturers include reference designs so it shouldn't be an issue. They want to sell as many chips as possible and having well documented implementation guide helps in this regard.

 

USB is a standard and they design toward that.

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You mean that the DAC chip is not influenced by the variation in USB front-ends?

 

I measured the delay from the first bit of a sample going into the chip over I2S until the corresponding change in the analogue output. The chip doesn't know or care how much delay the data stream was subject to prior to that.

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